diff --git a/.github/workflows/minichlink.yml b/.github/workflows/minichlink.yml
new file mode 100644
index 0000000000000000000000000000000000000000..517382fe584f8cc7c3385e2e08762c0226eb1636
--- /dev/null
+++ b/.github/workflows/minichlink.yml
@@ -0,0 +1,69 @@
+name: Build minichlink
+
+on: [push, pull_request]
+#    push:
+#        paths:
+#            - minichlink/**
+#    pull_request:
+#        paths:
+#            - minichlink/**
+jobs:
+  build-minichlink:
+    strategy:
+        fail-fast: false
+        matrix:
+            os: [ubuntu-latest, macos-12, macos-11]
+    runs-on: ${{matrix.os}}
+    steps:
+    - uses: actions/checkout@v3
+    - name: Install Dependencies (Linux)
+      if: ${{ matrix.os == 'ubuntu-latest' }}
+      run: sudo apt-get update && sudo apt-get install -y build-essential make libusb-1.0-0-dev libudev-dev mingw-w64-x86-64-dev gcc-mingw-w64-x86-64
+    # we don't need to brew install libusb on Mac, actually preinstalled on the runner! :)
+    - name: Build (Linux, Mac)
+      run: |
+       cd minichlink
+       make clean
+       make V=1 -j3
+    # we cross-compile the Windows binaries from Linux 
+    - name: Build (for Windows)
+      if: ${{ matrix.os == 'ubuntu-latest' }}
+      run: |
+        cd minichlink
+        OS=Windows_NT make clean
+        OS=Windows_NT make V=1 -j3 minichlink.exe
+
+    - name: "Pack (Linux)"
+      if: ${{ matrix.os == 'ubuntu-latest' }}
+      run: tar czf minichlink.tar.gz -C minichlink minichlink minichlink.so 99-minichlink.rules
+    - name: "Pack (Mac)"
+      if: ${{ matrix.os == 'macos-12' || matrix.os == 'macos-11' }}
+      run: tar czf minichlink.tar.gz -C minichlink minichlink
+    # no packing needed for Windows as it's .exe only
+
+    - name: "Upload minichlink (Linux)"
+      if: ${{ matrix.os == 'ubuntu-latest' }}
+      uses: actions/upload-artifact@v3
+      with:
+        name: minichlink (Linux)
+        path: minichlink.tar.gz
+    - name: "Upload minichlink (MacOs 11)"
+      if: ${{ matrix.os == 'macos-11' }}
+      uses: actions/upload-artifact@v3
+      with:
+        name: minichlink (MacOS 11)
+        path: minichlink.tar.gz  
+    - name: "Upload minichlink (MacOs 12)"
+      if: ${{ matrix.os == 'macos-12' }}
+      uses: actions/upload-artifact@v3
+      with:
+        name: minichlink (MacOS 12)
+        path: minichlink.tar.gz  
+    - name: "Upload minichlink (Windows)"
+      if: ${{ matrix.os == 'ubuntu-latest' }}
+      uses: actions/upload-artifact@v3
+      with:
+        name: minichlink (Windows)
+        path: | 
+          minichlink/minichlink.exe
+          minichlink/libusb-1.0.dll
diff --git a/.gitignore b/.gitignore
index a9445131bff9ac74f443e4f7865bb47e32f54769..f79293a9c0b686f0cb5fcd5f5760dfcea671c309 100644
--- a/.gitignore
+++ b/.gitignore
@@ -9,3 +9,5 @@
 minichlink/minichlink
 minichlink/minichlink.so
 compile_commands.json
+.clangd
+.cache
diff --git a/README.md b/README.md
index fe987373a5e339f2c9b0b92d0cf3598834d58def..fcdc921a0a185712f219684898605104d560bd4d 100644
--- a/README.md
+++ b/README.md
@@ -10,23 +10,26 @@ ch32v003fun contains:
   * An STM32F042 Programmer, the NHC-Link042
   * An ESP32S2 Programmer, the [esp32s2-funprog](https://github.com/cnlohr/esp32s2-cookbook/tree/master/ch32v003programmer)
   * The official WCH Link-E Programmer.
+  * Supports gdbserver-style-debugging for use with Visual Studio.
+  * Supports printf-over-single-wire. (At about 400kBaud)
 3. An extra copy of libgcc so you can use unusual risc-v build chains, located in the `misc/libgcc.a`.
 4. A folder named "ch32v003fun" containing a single self-contained source file and header file for compling apps for the ch32v003.
 5. On some systems ability to "printf" back through
 6. A demo bootloader.
 
 In Progress:
-1. Other programmer support (ESP32-S2 works, currently)
-2. OpenOCD-compatible build for `minichlink`.
-3. Full-chip-write for faster flash.
-4. Support for `NHC-Link042`
-5. Write more demos.
+1. Write more demos.
+2. Improve/integrate [rv003usb](https://github.com/cnlohr/rv003usb/)
 
-## Features
+## Getting Started
 
-### A fast "printf" debug over the programming interface.
+For installation instructions, see the [wiki page here](https://github.com/cnlohr/ch32v003fun/wiki/Installation)
 
-And by fast I mean very fast. Typically around 36kBytes/sec. 
+## Features!
+
+###  A fast "printf" debug over the programming interface.
+
+And by fast I mean very fast. Typically around 36kBytes/sec.
 
 ```
 ./minichlink -T | pv > /dev/null
@@ -34,22 +37,11 @@ Found ESP32S2 Programmer
  536KiB 0:00:15 [36.7KiB/s] [        <=>                     ]
 ```
 
-You can just try out the `debugprintf` project, or call `SetupDebugPrintf();` and `printf()` away.
-
-### todo;;
-
-
-## System Prep
+You can just try out the debugprintf project, or call SetupDebugPrintf(); and printf() away.
 
-On WSL or Debian based OSes `apt-get install build-essential libnewlib-dev gcc-riscv64-unknown-elf libusb-1.0-0-dev libudev-dev`
+### Debugging support!
 
-On Arch/Manjaro, `sudo pacman -S base-devel libusb`, then from AUR install `riscv64-unknown-elf-gcc, riscv64-unknown-elf-binutils, riscv64-unknown-elf-newlib` (will compile for a long time).
-
-On Windows, download and install (to system) this copy of GCC10. https://gnutoolchains.com/risc-v/
-
-On macOS install the RISC-V toolchain with homebrew following the instructions at https://github.com/riscv-software-src/homebrew-riscv
-
-You can use the pre-compiled minichlink or go to minichlink dir and `make` it.
+Via gdbserver built into minichlink!  It works with `gdb-multiarch` as well as in Visual Studio Code 
 
 ## Building and Flashing
 
@@ -58,87 +50,14 @@ cd examples/blink
 make
 ```
 
-In Linux this will "just work"(TM) using `minichlink`.  
-In Windows, if you want to use minichlink, you will need to use Zadig to install WinUSB to the WCH-Link interface 0.  
-The generated .hex file is compatible with the official WCH flash tool.  
-
 text = code, data = constants and initialization values, bss = uninitialized values.  
 dec is the sum of the 3 and reflects the number of bytes in flash that will get taken up by the program.
 
+The generated .bin is used by minichlink and the .hex file is compatible with the official WCH flash tool.  
 
-## ESP32S2 Programming
-
-## WCH-Link (E)
-
-It enumerates as 2 interfaces.
-0. the programming interface.  I can't get anything except the propreitary interface to work.
-1. the built-in usb serial port. You can hook up UART D5=TX to RX and D6=RX to TX of the CH32V003 for printf/debugging, default speed is 115200. Both are optional, connect what you need.
-
-If you want to mess with the programming code in Windows, you will have to install WinUSB to the interface 0.  Then you can uninstall it in Device Manager under USB Devices.
-
-On linux you find the serial port with `ls -l /dev/ttyUSB* /dev/ttyACM*` and connect to it with `screen /dev/ttyACM0 115200`  
-Disconnect with `CTRL+a` `:quit`.  
-
-Adding your user to these groups will remove the need to `sudo` for access to the serial port:
-debian-based
-	`sudo usermod -a -G dialout $USER`
-arch-based
-	`sudo usermod -a -G uucp $USER`
- 
- You'll need to log out and in to see the change.
-
-
-## WCH-Link Hardware access in WSL
-To use the WCH-Link in WSL, it is required to "attach" the USB hardware on the Windows side to WSL.  This is achieved using a tool called usbipd.
-
-1. On windows side, install the following MSI https://github.com/dorssel/usbipd-win/releases
-2. Install the WSL side client:
-    * For Debian: 
-        `sudo apt-get install usbip hwdata usbutils`
-    * For Arch-based:
-        `sudo pacman -S usbip hwdata usbutils`
-    * For Ubuntu (not tested):
-```
-        sudo apt install linux-tools-5.4.0-77-generic linux-tools-virtual hwdata usbutils
-        sudo update-alternatives --install /usr/local/bin/usbip usbip `ls /usr/lib/linux-tools/*/usbip | tail -n1` 20
-```
-
-3. Plug in the WCH-Link to USB
-4. Run Powershell as admin and use the `usbipd list` command to list all connected devices
-5. Find the this device: `1a86:8010  WCH-Link (Interface 0)` and note the busid it is attached to
-6. In powershell, use the command `usbipd wsl attach --busid=<BUSID>` to attach the device at the busid from previous step
-7. You will hear the windows sound for the USB device being removed (and silently attached to WSL instead)
-8. In WSL, you will now be able to run `lsusb` and see that the SCH-Link is attached
-9. For unknown reasons, you must run make under root access in order to connect to the programmer with minichlink.  Recommend running `sudo make` when building and programming projects using WSL. This may work too (to be confirmed):
-
-### non-root access on linux
-Unlike serial interfaces, by default, the USB device is owned by root, has group set to root and everyone else may only read by default.
-The way to allow non-root users/groups to be able to access devices is via udev rules.
-
-minichlink provides a list of udev rules that allows any user in the plugdev group to be able to interact with the programmers it supports.
-
-You can install and load the required udev rules for minichlink by executing the following commands in the root of this Git repository:
-```
-sudo cp minichlink/99-minichlink.rules /etc/udev/rules.d/
-sudo udevadm control --reload-rules && sudo udevadm trigger
-```
-
-If you add support for another programmer in minichlink, you will need to add more rules here.
+## VSCode +/- PlatformIO
 
-**Note:** This readme used to recommend manually making these rules under `80-USB_WCH-Link.rules`. If you wish to use the new rules file shipped in this repo, you may want to remove the old rules file.
-
-
-## minichlink
-
-I wrote some libusb copies of some of the basic functionality from WCH-Link, so you can use the little programmer dongle they give you to program the ch32v003. 
-
-Currently, it ignores all the respone codes, except when querying the chip.  But it's rather surprising how featured I could get in about 5 hours.
-
-Anyone who wants to write a good/nice utility should probably look at the code in this folder.
-
-## VSCode + PlatformIO
-
-Note: This is genearlly used for CI on this repo.  However, note that this is **not** the path that allows for debugging on Windows.
+Note: With PlatformIO is genearlly used for CI on this repo.  However, note that this is **not** the path that allows for debugging on Windows.
 
 This project can also be built, uploaded and debugged with VSCode and the PlatformIO extension. Simply clone and open this project in VSCode and have the PlatformIO extension installed.
 
@@ -155,6 +74,11 @@ If the C/C++ language server clangd is unable to find `ch32v003fun.h`, the examp
  * Optional (not needed, can be configured as output if fuse set): `NRST` is on `PD7`
  * UART TX (optional) is on: `PD5`
 
+![ch32v003a4m6](https://raw.githubusercontent.com/Tengo10/pinout-overview/main/pinouts/CH32v003/ch32v003a4m6.svg)
+![ch32v003f4p6](https://raw.githubusercontent.com/Tengo10/pinout-overview/main/pinouts/CH32v003/ch32v003f4p6.svg)
+![ch32v003f4u6](https://raw.githubusercontent.com/Tengo10/pinout-overview/main/pinouts/CH32v003/ch32v003f4u6.svg)
+![ch32v003j4m6](https://raw.githubusercontent.com/Tengo10/pinout-overview/main/pinouts/CH32v003/ch32v003j4m6.svg)
+
 ## Support
 
 You can open a github ticket or join my Discord in the #ch32v003fun channel. https://discord.gg/CCeyWyZ
@@ -165,3 +89,5 @@ You can open a github ticket or join my Discord in the #ch32v003fun channel. htt
  * http://www.wch-ic.com/downloads/QingKeV2_Processor_Manual_PDF.html Processor Manual
  * http://www.wch-ic.com/downloads/CH32V003RM_PDF.html Technical Reference Manual
  * http://www.wch-ic.com/downloads/CH32V003DS0_PDF.html Datasheet
+ * https://github.com/CaiB/CH32V003-Architecture-Exploration/blob/main/InstructionTypes.md Details for the compressed ISA on this chip.
+ * The CH32V003 has xv extensions, you can use this customized version of rvcodec.js to work with its opcodes: https://xw.macyler.moe/
diff --git a/NHC-Link042/LibUSB/LibUSB.c b/attic/NHC-Link042/LibUSB/LibUSB.c
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rename from NHC-Link042/LibUSB/LibUSB.c
rename to attic/NHC-Link042/LibUSB/LibUSB.c
diff --git a/NHC-Link042/LibUSB/LibUSB.h b/attic/NHC-Link042/LibUSB/LibUSB.h
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rename from NHC-Link042/LibUSB/LibUSB.h
rename to attic/NHC-Link042/LibUSB/LibUSB.h
diff --git a/NHC-Link042/NHC-Link042.uvprojx b/attic/NHC-Link042/NHC-Link042.uvprojx
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rename from NHC-Link042/NHC-Link042.uvprojx
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diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
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diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Release_Notes.html b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Release_Notes.html
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diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/TrueSTUDIO/startup_stm32f030.s b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/TrueSTUDIO/startup_stm32f030.s
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diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/TrueSTUDIO/startup_stm32f031.s b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/TrueSTUDIO/startup_stm32f031.s
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diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/TrueSTUDIO/startup_stm32f042.s b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/TrueSTUDIO/startup_stm32f042.s
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diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/TrueSTUDIO/startup_stm32f051.s b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/TrueSTUDIO/startup_stm32f051.s
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diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/arm/startup_stm32f030.s b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/arm/startup_stm32f030.s
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diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/arm/startup_stm32f031.s b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/arm/startup_stm32f031.s
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diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_comp.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_comp.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_comp.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_comp.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_crc.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_crc.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_crc.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_crc.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_crs.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_crs.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_crs.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_crs.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dac.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dac.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dac.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dac.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dbgmcu.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dbgmcu.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dbgmcu.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dbgmcu.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dma.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dma.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dma.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dma.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_exti.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_exti.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_exti.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_exti.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_flash.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_flash.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_flash.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_flash.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_gpio.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_gpio.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_gpio.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_gpio.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_i2c.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_i2c.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_i2c.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_i2c.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_iwdg.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_iwdg.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_iwdg.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_iwdg.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_misc.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_misc.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_misc.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_misc.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_pwr.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_pwr.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_pwr.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_pwr.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rcc.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rcc.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rcc.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rcc.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rtc.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rtc.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rtc.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rtc.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_spi.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_spi.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_spi.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_spi.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_syscfg.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_syscfg.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_syscfg.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_syscfg.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_tim.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_tim.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_tim.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_tim.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_usart.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_usart.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_usart.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_usart.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_wwdg.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_wwdg.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_wwdg.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_wwdg.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_adc.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_adc.c
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_adc.c
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_adc.c
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_can.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_can.c
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_can.c
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_can.c
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_cec.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_cec.c
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_cec.c
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_cec.c
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_comp.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_comp.c
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_comp.c
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_comp.c
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_crc.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_crc.c
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_crc.c
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_crc.c
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_crs.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_crs.c
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_crs.c
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_crs.c
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dac.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dac.c
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dac.c
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dac.c
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dbgmcu.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dbgmcu.c
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dbgmcu.c
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dbgmcu.c
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dma.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dma.c
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dma.c
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dma.c
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_exti.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_exti.c
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_exti.c
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_exti.c
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_flash.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_flash.c
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_flash.c
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_flash.c
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_gpio.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_gpio.c
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_gpio.c
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_gpio.c
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_i2c.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_i2c.c
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diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Class/audio/inc/usbd_audio_core.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Class/audio/inc/usbd_audio_core.h
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diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Class/ccid/inc/usbd_ccid_cmd.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Class/ccid/inc/usbd_ccid_cmd.h
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diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Class/cdc/inc/usbd_cdc_core.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Class/cdc/inc/usbd_cdc_core.h
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rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/inc/usbd_req.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/inc/usbd_req.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/inc/usbd_usr.h b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/inc/usbd_usr.h
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/inc/usbd_usr.h
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/inc/usbd_usr.h
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/src/usbd_core.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/src/usbd_core.c
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/src/usbd_core.c
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/src/usbd_core.c
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/src/usbd_ioreq.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/src/usbd_ioreq.c
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/src/usbd_ioreq.c
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/src/usbd_ioreq.c
diff --git a/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/src/usbd_req.c b/attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/src/usbd_req.c
similarity index 100%
rename from NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/src/usbd_req.c
rename to attic/NHC-Link042/STM32F0x2_USB-FS-Device_Lib V1.0.0/Libraries/STM32_USB_Device_Library/Core/src/usbd_req.c
diff --git a/NHC-Link042/User/NHC_WCH_SDI.c b/attic/NHC-Link042/User/NHC_WCH_SDI.c
similarity index 100%
rename from NHC-Link042/User/NHC_WCH_SDI.c
rename to attic/NHC-Link042/User/NHC_WCH_SDI.c
diff --git a/NHC-Link042/User/NHC_WCH_SDI.h b/attic/NHC-Link042/User/NHC_WCH_SDI.h
similarity index 100%
rename from NHC-Link042/User/NHC_WCH_SDI.h
rename to attic/NHC-Link042/User/NHC_WCH_SDI.h
diff --git a/NHC-Link042/User/config.h b/attic/NHC-Link042/User/config.h
similarity index 100%
rename from NHC-Link042/User/config.h
rename to attic/NHC-Link042/User/config.h
diff --git a/NHC-Link042/User/it.c b/attic/NHC-Link042/User/it.c
similarity index 100%
rename from NHC-Link042/User/it.c
rename to attic/NHC-Link042/User/it.c
diff --git a/NHC-Link042/User/main.c b/attic/NHC-Link042/User/main.c
similarity index 100%
rename from NHC-Link042/User/main.c
rename to attic/NHC-Link042/User/main.c
diff --git a/NHC-Link042/User/stm32_it.c b/attic/NHC-Link042/User/stm32_it.c
similarity index 100%
rename from NHC-Link042/User/stm32_it.c
rename to attic/NHC-Link042/User/stm32_it.c
diff --git a/NHC-Link042/User/stm32_it.h b/attic/NHC-Link042/User/stm32_it.h
similarity index 100%
rename from NHC-Link042/User/stm32_it.h
rename to attic/NHC-Link042/User/stm32_it.h
diff --git a/NHC-Link042/User/stm32f0xx_conf.h b/attic/NHC-Link042/User/stm32f0xx_conf.h
similarity index 100%
rename from NHC-Link042/User/stm32f0xx_conf.h
rename to attic/NHC-Link042/User/stm32f0xx_conf.h
diff --git a/NHC-Link042/User/system_stm32f0xx.c b/attic/NHC-Link042/User/system_stm32f0xx.c
similarity index 100%
rename from NHC-Link042/User/system_stm32f0xx.c
rename to attic/NHC-Link042/User/system_stm32f0xx.c
diff --git a/NHC-Link042/User/usb_bsp.c b/attic/NHC-Link042/User/usb_bsp.c
similarity index 100%
rename from NHC-Link042/User/usb_bsp.c
rename to attic/NHC-Link042/User/usb_bsp.c
diff --git a/NHC-Link042/User/usb_conf.h b/attic/NHC-Link042/User/usb_conf.h
similarity index 100%
rename from NHC-Link042/User/usb_conf.h
rename to attic/NHC-Link042/User/usb_conf.h
diff --git a/NHC-Link042/User/usbd_conf.h b/attic/NHC-Link042/User/usbd_conf.h
similarity index 100%
rename from NHC-Link042/User/usbd_conf.h
rename to attic/NHC-Link042/User/usbd_conf.h
diff --git a/NHC-Link042/User/usbd_desc.c b/attic/NHC-Link042/User/usbd_desc.c
similarity index 100%
rename from NHC-Link042/User/usbd_desc.c
rename to attic/NHC-Link042/User/usbd_desc.c
diff --git a/NHC-Link042/User/usbd_desc.h b/attic/NHC-Link042/User/usbd_desc.h
similarity index 100%
rename from NHC-Link042/User/usbd_desc.h
rename to attic/NHC-Link042/User/usbd_desc.h
diff --git a/NHC-Link042/User/usbd_pwr.c b/attic/NHC-Link042/User/usbd_pwr.c
similarity index 100%
rename from NHC-Link042/User/usbd_pwr.c
rename to attic/NHC-Link042/User/usbd_pwr.c
diff --git a/NHC-Link042/User/usbd_usr.c b/attic/NHC-Link042/User/usbd_usr.c
similarity index 100%
rename from NHC-Link042/User/usbd_usr.c
rename to attic/NHC-Link042/User/usbd_usr.c
diff --git a/ch32v003fun/ch32v003fun.c b/ch32v003fun/ch32v003fun.c
index 3db230e278ae919ad2949855dda25c9299b9711a..6e6e60d4cd857cfa262c115b104370d6eef845c1 100644
--- a/ch32v003fun/ch32v003fun.c
+++ b/ch32v003fun/ch32v003fun.c
@@ -780,10 +780,10 @@ void handle_reset()
 "	li a0, 0x80\n\
 	csrw mstatus, a0\n\
 	li a3, 0x3\n\
-	csrw 0x804, a3\n\
 	la a0, InterruptVector\n\
 	or a0, a0, a3\n\
-	csrw mtvec, a0\n" );
+	csrw mtvec, a0\n" 
+	: : : "a0", "a3", "memory");
 
 	// Careful: Use registers to prevent overwriting of self-data.
 	// This clears out BSS.
@@ -810,8 +810,11 @@ asm volatile(
 #ifdef CPLUSPLUS
 	// Call __libc_init_array function
 "	call %0 \n\t"
-: : "i" (__libc_init_array) :
+: : "i" (__libc_init_array)
+#else
+: :
 #endif
+: "a0", "a1", "a2", "a3", "memory"
 );
 
 	SETUP_SYSTICK_HCLK
diff --git a/ch32v003fun/ch32v003fun.h b/ch32v003fun/ch32v003fun.h
index c79248c7b8b51ac81eb6c9be8eb46c77ea81c902..1634bcb8e1d59b10b564fba9e94370168f4dddee 100644
--- a/ch32v003fun/ch32v003fun.h
+++ b/ch32v003fun/ch32v003fun.h
@@ -4474,7 +4474,11 @@ RV_STATIC_INLINE void __enable_irq()
 {
   uint32_t result;
 
-  __asm volatile("csrr %0," "mstatus": "=r"(result));
+    __asm volatile(
+#if __GNUC__ > 10
+		".option arch, +zicsr\n"
+#endif
+		"csrr %0," "mstatus": "=r"(result));
   result |= 0x88;
   __asm volatile ("csrw mstatus, %0" : : "r" (result) );
 }
@@ -4490,7 +4494,11 @@ RV_STATIC_INLINE void __disable_irq()
 {
   uint32_t result;
 
-  __asm volatile("csrr %0," "mstatus": "=r"(result));
+    __asm volatile(
+#if __GNUC__ > 10
+		".option arch, +zicsr\n"
+#endif
+		"csrr %0," "mstatus": "=r"(result));
   result &= ~0x88;
   __asm volatile ("csrw mstatus, %0" : : "r" (result) );
 }
@@ -4625,6 +4633,47 @@ RV_STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint8_t priority)
   NVIC->IPRIOR[(uint32_t)(IRQn)] = priority;
 }
 
+/*********************************************************************
+ * SUSPEND ALL INTERRUPTS EXCEPT
+ * The following 3 functions serve to suspend all interrupts, except for the one you momentarily need.
+ * The purpose of this is to not disturb the one interrupt of interest and let it run unimpeded.
+ * procedure:
+ * 1. save the enabled IRQs: uint32_t IRQ_backup = NVIC_get_enabled_IRQs();
+ * 2. disable all IRQs: NVIC_clear_all_IRQs_except(IRQ_of_interest);
+ * 3. restore the previously enabled IRQs: NVIC_restore_IRQs(IRQ_backup);
+ * 
+ * bit layout of the IRQ backup
+ * bit		0 | 1 | 2  |  3  | 4  |  5  | 6  .. 22 | 23 .. 28
+ * IRQn		2 | 3 | 12 | res | 14 | res | 16 .. 31 | 32 .. 38
+ * IRQn 2 and 3 aren't actually user-settable (see RM).
+ * 
+ * Specifying an invalid IRQn_to_keep like 0 will disable all interrupts.
+ */
+
+RV_STATIC_INLINE uint32_t NVIC_get_enabled_IRQs()
+{
+	return ( ((NVIC->ISR[0] >> 2) & 0b11) | ((NVIC->ISR[0] >> 12) << 2) | ((NVIC->ISR[1] & 0b1111111) << 23) );
+}
+
+RV_STATIC_INLINE void NVIC_clear_all_IRQs_except(uint8_t IRQn_to_keep)
+{
+	if (!(IRQn_to_keep >> 5)) {		// IRQn_to_keep < 32
+		NVIC->IRER[0] = (~0) & (~(1 << IRQn_to_keep));
+		NVIC->IRER[1] = (~0);
+	}
+	else {
+		IRQn_to_keep = IRQn_to_keep >> 5;
+		NVIC->IRER[0] = (~0);
+		NVIC->IRER[1] = (~0) & (~(1 << IRQn_to_keep));
+	}
+}
+
+RV_STATIC_INLINE void NVIC_restore_IRQs(uint32_t old_state)
+{
+	NVIC->IENR[0] = (old_state >> 2) << 12;
+	NVIC->IENR[1] = old_state >> 23;
+}
+
 /*********************************************************************
  * @fn       __WFI
  *
@@ -4958,9 +5007,11 @@ static inline uint32_t __get_SP(void)
 extern "C" {
 #endif
 
-// You can use SYSTICK_USE_HCLK, if you do, you will have a high-resolution
-// however it will limit your max delay to 44 seconds before it will wrap
-// around.  You must also call SETUP_SYSTICK_HCLK.
+/* SYSTICK info
+ * time on the ch32v003 is kept by the SysTick counter (32bit)
+ * by default, it will operate at (SYSTEM_CORE_CLOCK / 8) = 6MHz
+ * more info at https://github.com/cnlohr/ch32v003fun/wiki/Time
+*/
 
 #ifdef SYSTICK_USE_HCLK
 #define DELAY_US_TIME ((SYSTEM_CORE_CLOCK)/1000000)
@@ -4972,6 +5023,14 @@ extern "C" {
 #define SETUP_SYSTICK_HCLK SysTick->CTLR = 1;
 #endif
 
+#define Delay_Us(n) DelaySysTick( (n) * DELAY_US_TIME )
+#define Delay_Ms(n) DelaySysTick( (n) * DELAY_MS_TIME )
+
+#define Ticks_from_Us(n)	(n * DELAY_US_TIME)
+#define Ticks_from_Ms(n)	(n * DELAY_MS_TIME)
+
+
+
 #if defined(__riscv) || defined(__riscv__) || defined( CH32V003FUN_BASE )
 
 // Stuff that can only be compiled on device (not for the programmer, or other host programs)
@@ -4987,8 +5046,7 @@ void DefaultIRQHandler( void ) __attribute__((section(".text.vector_handler")))
 
 #endif
 
-#define Delay_Us(n) DelaySysTick( (n) * DELAY_US_TIME )
-#define Delay_Ms(n) DelaySysTick( (n) * DELAY_MS_TIME )
+
 
 #ifndef __ASSEMBLER__
 
diff --git a/ch32v003fun/ch32v003fun.mk b/ch32v003fun/ch32v003fun.mk
index 15330b3b62a6a343138612e7198d59cf3a89f9ca..278b7361d74b728961d7fe4678ce8931aca58ee3 100644
--- a/ch32v003fun/ch32v003fun.mk
+++ b/ch32v003fun/ch32v003fun.mk
@@ -52,9 +52,12 @@ gdbserver :
 clangd :
 	make clean
 	bear -- make build
+	@echo "CompileFlags:" > .clangd
+	@echo "  Remove: [-march=*, -mabi=*]" >> .clangd
 
 clangd_clean :
-	rm -f compile_commands.json
+	rm -f compile_commands.json .clangd
+	rm -rf .cache
 
 FLASH_COMMAND?=$(MINICHLINK)/minichlink -w $< $(WRITE_SECTION) -b
 
diff --git a/ch32v003fun/xw_ext.inc b/ch32v003fun/xw_ext.inc
new file mode 100644
index 0000000000000000000000000000000000000000..ca210702fc69d9d31b87d9f69ddaf004c17e0b0c
--- /dev/null
+++ b/ch32v003fun/xw_ext.inc
@@ -0,0 +1,57 @@
+/*
+Encoder for some of the proprietary 'XW' RISC-V instructions present on the QingKe RV32 processor.
+Examples:
+	XW_C_LBU(a3, a1, 27); // c.xw.lbu a3, 27(a1)
+	XW_C_SB(a0, s0, 13);  // c.xw.sb a0, 13(s0)
+
+	XW_C_LHU(a5, a5, 38); // c.xw.lhu a5, 38(a5)
+	XW_C_SH(a2, s1, 14);  // c.xw.sh a2, 14(s1)
+*/
+
+// Let us do some compile-time error checking.
+#define ASM_ASSERT(COND) .if (!(COND)); .err; .endif
+
+// Integer encodings of the possible compressed registers.
+#define C_s0 0
+#define C_s1 1
+#define C_a0 2
+#define C_a1 3
+#define C_a2 4
+#define C_a3 5
+#define C_a4 6
+#define C_a5 7
+
+// register to encoding
+#define REG2I(X) (C_ ## X)
+
+// XW opcodes
+#define XW_OP_LBUSP 0b1000000000000000
+#define XW_OP_STSP  0b1000000001000000
+
+#define XW_OP_LHUSP 0b1000000000100000
+#define XW_OP_SHSP  0b1000000001100000
+
+#define XW_OP_LBU   0b0010000000000000
+#define XW_OP_SB    0b1010000000000000
+
+#define XW_OP_LHU   0b0010000000000010
+#define XW_OP_SH    0b1010000000000010
+
+// The two different XW encodings supported at the moment.
+#define XW_ENCODE1(OP, R1, R2, IMM) ASM_ASSERT((IMM) >= 0 && (IMM) < 32); .2byte ((OP) | (REG2I(R1) << 2) | (REG2I(R2) << 7) | \
+	(((IMM) & 0b1) << 12) | (((IMM) & 0b110) << (5 - 1)) | (((IMM) & 0b11000) << (10 - 3)))
+
+#define XW_ENCODE2(OP, R1, R2, IMM) ASM_ASSERT((IMM) >= 0 && (IMM) < 32); .2byte ((OP) | (REG2I(R1) << 2) | (REG2I(R2) << 7) | \
+	(((IMM) & 0b11) << 5) | (((IMM) & 0b11100) << (10 - 2))
+
+// Compressed load byte, zero-extend result
+#define XW_C_LBU(RD, RS, IMM) XW_ENCODE1(XW_OP_LBU, RD, RS, IMM)
+
+// Compressed store byte
+#define XW_C_SB(RS1, RS2, IMM) XW_ENCODE1(XW_OP_SB, RS1, RS2, IMM)
+
+// Compressed load half, zero-extend result
+#define XW_C_LHU(RD, RS, IMM) ASM_ASSERT(((IMM) & 1) == 0); XW_ENCODE2(XW_OP_LHU, RD, RS, ((IMM) >> 1)))
+
+// Compressed store half
+#define XW_C_SH(RS1, RS2, IMM)  ASM_ASSERT(((IMM) & 1) == 0); XW_ENCODE2(XW_OP_SH, RS1, RS2, ((IMM) >> 1)))
diff --git a/examples/GPIO/GPIO.c b/examples/GPIO/GPIO.c
index 148aa0198a1710d1b298fbf2f6c038201a90b6e6..a761850c339f8e445fc38585064b58a92c73a6ec 100644
--- a/examples/GPIO/GPIO.c
+++ b/examples/GPIO/GPIO.c
@@ -1,47 +1,199 @@
-// blink, but with arduino-like HAL
-// Could be defined here, or in the processor defines.
+// 2023-06-07 recallmenot
+
+#define DEMO_GPIO_blink					1
+#define DEMO_GPIO_out					0
+#define DEMO_GPIO_in_btn				0
+#define DEMO_ADC_bragraph				0
+#define DEMO_PWM_dayrider				0
+
+#if ((DEMO_GPIO_blink + DEMO_GPIO_out + DEMO_GPIO_in_btn + DEMO_ADC_bragraph + DEMO_PWM_dayrider) > 1 \
+  || (DEMO_GPIO_blink + DEMO_GPIO_out + DEMO_GPIO_in_btn + DEMO_ADC_bragraph + DEMO_PWM_dayrider) < 1)
+#error "please enable ONE of the demos by setting it to 1 and the others to 0"
+#endif
+
+
 #define SYSTEM_CORE_CLOCK 48000000
+#define APB_CLOCK SYSTEM_CORE_CLOCK
 
 #include "ch32v003fun.h"
-#include "wiring.h"
+
+#include "ch32v003_GPIO_branchless.h"
+
 #include <stdio.h>
 
-#define APB_CLOCK SYSTEM_CORE_CLOCK
 
-uint32_t count;
 
 int main() {
 	SystemInit48HSI();
 
-	// Enable GPIO ports
-	portEnable(port_C);
-	portEnable(port_D);
-
-	for (int i = pin_C0; i <= pin_C7; i++) {
-		pinMode(i, pinMode_O_pushPull);
+#if DEMO_GPIO_blink == 1
+	GPIO_portEnable(GPIO_port_C);
+	GPIO_portEnable(GPIO_port_D);
+	// GPIO D0 Push-Pull
+	GPIO_pinMode(GPIO_port_D, 0, GPIO_pinMode_O_pushPull, GPIO_Speed_10MHz);
+	// GPIO D4 Push-Pull
+	GPIO_pinMode(GPIO_port_D, 4, GPIO_pinMode_O_pushPull, GPIO_Speed_10MHz);
+	// GPIO C0 Push-Pull
+	GPIO_pinMode(GPIO_port_C, 0, GPIO_pinMode_O_pushPull, GPIO_Speed_10MHz);
+#elif DEMO_GPIO_out == 1
+	GPIO_portEnable(GPIO_port_C);
+	GPIO_portEnable(GPIO_port_D);
+	// GPIO D4 Push-Pull
+	GPIO_pinMode(GPIO_port_D, 4, GPIO_pinMode_O_pushPull, GPIO_Speed_10MHz);
+	// GPIO C0 - C7 Push-Pull
+	for (int i = 0; i <= 7; i++) {
+		GPIO_pinMode(GPIO_port_C, i, GPIO_pinMode_O_pushPull, GPIO_Speed_10MHz);
 	}
-
+#elif DEMO_GPIO_in_btn == 1
+	GPIO_portEnable(GPIO_port_C);
+	GPIO_portEnable(GPIO_port_D);
+	// GPIO D4 Push-Pull
+	GPIO_pinMode(GPIO_port_D, 3, GPIO_pinMode_I_pullUp, GPIO_SPEED_IN);
+	// GPIO C0 - C7 Push-Pull
+	for (int i = 0; i <= 7; i++) {
+		GPIO_pinMode(GPIO_port_C, i, GPIO_pinMode_O_pushPull, GPIO_Speed_10MHz);
+	}
+#elif DEMO_ADC_bragraph == 1
+	GPIO_portEnable(GPIO_port_C);
+	GPIO_portEnable(GPIO_port_D);
 	// GPIO D4 Push-Pull
-	pinMode(pin_D4, pinMode_O_pushPull);
+	GPIO_pinMode(GPIO_port_D, 4, GPIO_pinMode_O_pushPull, GPIO_Speed_10MHz);
+	// GPIO D6 analog in
+	GPIO_pinMode(GPIO_port_D, 6, GPIO_pinMode_I_analog, GPIO_SPEED_IN);
+	// GPIO C0 - C7 Push-Pull
+	for (int i = 0; i<= 7; i++) {
+		GPIO_pinMode(GPIO_port_C, i, GPIO_pinMode_O_pushPull, GPIO_Speed_10MHz);
+	}
+	GPIO_ADCinit();
+#elif DEMO_PWM_dayrider == 1
+	//SetupUART( UART_BRR );
+	GPIO_portEnable(GPIO_port_C);
+	GPIO_portEnable(GPIO_port_D);
+	// GPIO D4 Push-Pull
+	GPIO_pinMode(GPIO_port_D, 4, GPIO_pinMode_O_pushPull, GPIO_Speed_10MHz);
+	// GPIO D6 analog in
+	GPIO_pinMode(GPIO_port_D, 6, GPIO_pinMode_I_analog, GPIO_SPEED_IN);
+	// GPIO C0 - C7 Push-Pull
+	for (int i = 0; i<= 7; i++) {
+		GPIO_pinMode(GPIO_port_C, i, GPIO_pinMode_O_pushPullMux, GPIO_Speed_50MHz);
+	}
+	GPIO_tim2_map(GPIO_tim2_output_set_1__C5_C2_D2_C1);
+	GPIO_tim2_init();
+	GPIO_tim2_enableCH(4);
+	GPIO_tim2_enableCH(2);
+	GPIO_tim2_enableCH(1);
+	GPIO_tim1_map(GPIO_tim1_output_set_0__D2_A1_C3_C4__D0_A2_D1);
+	GPIO_tim1_init();
+	GPIO_tim1_enableCH(3);
+	GPIO_tim1_enableCH(4);
+#endif
+	
+
 
 	while (1) {
-		// Turn on pins
-		digitalWrite(pin_C0, high);
-		digitalWrite(pin_D4, high);
+#if DEMO_GPIO_blink == 1
+		GPIO_digitalWrite(GPIO_port_D, 0, high);
+		GPIO_digitalWrite(GPIO_port_D, 4, high);
+		GPIO_digitalWrite(GPIO_port_C, 0, high);
+		Delay_Ms( 250 );
+		GPIO_digitalWrite(GPIO_port_D, 0, low);
+		GPIO_digitalWrite(GPIO_port_D, 4, low);
+		GPIO_digitalWrite(GPIO_port_C, 0, low);
+		Delay_Ms( 250 );
+#elif DEMO_GPIO_out == 1
+		GPIO_digitalWrite(GPIO_port_D, 4, low);
+		Delay_Ms(1000);
+		GPIO_digitalWrite(GPIO_port_D, 4, high);
 		Delay_Ms(250);
-		// Turn off pins
-		digitalWrite(pin_C0, low);
-		digitalWrite(pin_D4, low);
-		Delay_Ms(250);
-		for (int i = pin_C0; i <= pin_C7; i++) {
-			digitalWrite(i, high);
+		for (int i = 0; i <= 7; i++) {
+			GPIO_digitalWrite_hi(GPIO_port_C, i);
 			Delay_Ms(50);
 		}
-		for (int i = pin_C7; i >= pin_C0; i--) {
-			digitalWrite(i, low);
+		for (int i = 7; i >= 0; i--) {
+			GPIO_digitalWrite_lo(GPIO_port_C, i);
 			Delay_Ms(50);
 		}
-		Delay_Ms(250);
-		count++;
+#elif DEMO_GPIO_in_btn == 1
+		uint8_t button_is_pressed = !GPIO_digitalRead(GPIO_port_D, 3);
+		static uint8_t leds_to_turn_on;
+		if (button_is_pressed && leds_to_turn_on < 8) {
+			leds_to_turn_on++;
+		}
+		else if (!button_is_pressed && leds_to_turn_on > 0) {
+			leds_to_turn_on--;
+		}
+		uint8_t led_i = 0;
+		for (int i = 0; i<= 7; i++) {
+			if (led_i < leds_to_turn_on) {
+				GPIO_digitalWrite_hi(GPIO_port_C, i);
+			}
+			else {
+				GPIO_digitalWrite_lo(GPIO_port_C, i);
+			}
+			led_i++;
+		}
+		Delay_Ms(50);
+#elif DEMO_ADC_bragraph == 1
+		GPIO_digitalWrite(GPIO_port_D, 4, high);
+		uint16_t analog_result = GPIO_analogRead(GPIO_Ain6_D6);
+		analog_result = analog_result > 10 ?
+				(analog_result < ((1 << 10) - 42) ? analog_result + 42 : (1 << 10))
+			: 0;
+		uint8_t leds_to_turn_on = analog_result >> 7;
+		uint8_t led_i = 0;
+		for (int i = 0; i<= 7; i++) {
+			if (led_i < leds_to_turn_on) {
+				GPIO_digitalWrite_hi(GPIO_port_C, i);
+			}
+			else {
+				GPIO_digitalWrite_lo(GPIO_port_C, i);
+			}
+			led_i++;
+		}
+		GPIO_digitalWrite(GPIO_port_D, 4, low);
+		Delay_Ms(50);
+#elif DEMO_PWM_dayrider == 1
+		#define NUMLEDS		5
+		#define TICKS_NEXT	149			// lower = faster scanning
+		#define TICK_i		2143			// lower = faster fade-out
+		GPIO_digitalWrite(GPIO_port_D, 4, high);
+		static uint8_t led_focus = 0;
+		static uint8_t direction = 0;
+
+		static uint16_t led_PW[NUMLEDS];
+
+		static uint32_t tick;
+
+		for (uint8_t i = 0; i < NUMLEDS; i++) {
+			if ((i == led_focus) && ((tick % TICKS_NEXT) == 0)) {
+				led_PW[i] = 1023;
+				//printf("focus %u, tick %u, direction %u\r\n", led_focus, tick, direction);
+				if (direction == 0) {
+					led_focus++;
+					if (led_focus >= (NUMLEDS - 1)) {
+						direction = 1;
+					}
+				}
+				else {
+					led_focus--;
+					if (led_focus == 0) {
+						direction = 0;
+					}
+				}
+				tick++;
+			}
+			else {
+				led_PW[i] = (led_PW[i] > 2) ? (led_PW[i] - 3) : 0;
+			}
+		}
+		GPIO_tim2_analogWrite(4, led_PW[0]);
+		GPIO_tim2_analogWrite(2, led_PW[1]);
+		GPIO_tim1_analogWrite(3, led_PW[2]);
+		GPIO_tim1_analogWrite(4, led_PW[3]);
+		GPIO_tim2_analogWrite(1, led_PW[4]);
+		GPIO_digitalWrite(GPIO_port_D, 4, low);
+		tick++;
+		Delay_Us(TICK_i);
+#endif
 	}
 }
diff --git a/examples/GPIO/Makefile b/examples/GPIO/Makefile
index 87347371d38e65e7c05f84225b553f957d5d1eca..7e60f814bb33181340eca2ad204cee695088fcc8 100644
--- a/examples/GPIO/Makefile
+++ b/examples/GPIO/Makefile
@@ -3,7 +3,7 @@ all : flash
 TARGET:=GPIO
 
 CFLAGS+=-DTINYVECTOR
-ADDITIONAL_C_FILES+=../../extralibs/wiring.c
+CFLAGS+=-DSTDOUT_UART
 
 include ../../ch32v003fun/ch32v003fun.mk
 
diff --git a/examples/GPIO/README.md b/examples/GPIO/README.md
index a6c23799ff7e6df932b10774273f86094daac8b3..33ac22d79daecb0e64c0c96c8df2f0d50450934a 100644
--- a/examples/GPIO/README.md
+++ b/examples/GPIO/README.md
@@ -1,14 +1,22 @@
-# GPIO Libaray
-On the shoulders of the Blink example, this Arduino-like GPIO library stands.
+# one GPIO libaray to rule them all
 
-All pins are adressable as outputs, inputs, with pull-up, etc.
-The pins are in an enum, so you can call them by their name and iterate over them.
+This Arduino-like GPIO library offers
+ * digital IO
+ * analog-to-digital
+ * digital-to-analog (PWM)
 
-It's your responsibility to not blow up a pin.
-Only use one pin for one thing and you should be fine.
+Great care has been taken to make the resulting code as fast and tiny as possible. Let the compiler suffer!  
+Hand-written blink compiles to 500 bytes, blink using this library compiles to 504 bytes!  
 
 # GPIO Example
-Connect LED + 1k resistor to each pin (C0 to C7 and D4) and GND.
-Marvel at the colorful glory.
 
-https://user-images.githubusercontent.com/104343143/231585338-725f1197-dfa0-484d-8707-f0824af80b7e.mp4
+Connect LED + 1k resistor to each LED pin (C0 to C7 and D4) and GND.  
+Connect a button to GND and D3.  
+Connect a 10k pot between GND and VCC, wiper to D6.  
+
+The desired demo may be selected in GPIO.c by setting it to 1 and the others to 0.  
+Marvel at the colorful glory.  
+
+
+
+https://github.com/recallmenot/ch32v003fun/assets/104343143/afb4027d-a609-467a-96c5-0cc3283366a4
diff --git a/examples/GPIO_analogRead/GPIO_analogRead.c b/examples/GPIO_analogRead/GPIO_analogRead.c
deleted file mode 100644
index 76df1facacafbbf45260486402d91266f1f93d7a..0000000000000000000000000000000000000000
--- a/examples/GPIO_analogRead/GPIO_analogRead.c
+++ /dev/null
@@ -1,47 +0,0 @@
-// blink, but with arduino-like HAL
-// Could be defined here, or in the processor defines.
-#define SYSTEM_CORE_CLOCK 48000000
-
-#include "ch32v003fun.h"
-#include "wiring.h"
-#include <stdio.h>
-
-#define APB_CLOCK SYSTEM_CORE_CLOCK
-
-uint32_t count;
-
-int main() {
-	SystemInit48HSI();
-
-	// Enable GPIO ports
-	portEnable(port_C);
-	portEnable(port_D);
-
-	for (int i = pin_C0; i <= pin_C7; i++) {
-		pinMode(i, pinMode_O_pushPull);
-	}
-
-	// GPIO D4 Push-Pull
-	pinMode(pin_D4, pinMode_O_pushPull);
-
-	pinMode(pin_D6, pinMode_I_analog);
-	ADCinit();
-
-	while (1) {
-		digitalWrite(pin_D4, high);
-		uint8_t leds_to_turn_on = (uint8_t)(((float)(analogRead(Ain6_D6)) / 1024.f) * 8.f * 1.2 - 1.f);
-		uint8_t led_i = 0;
-		for (int i = pin_C0; i <= pin_C7; i++) {
-			if (led_i < leds_to_turn_on) {
-				digitalWrite(i, high);
-			}
-			else {
-				digitalWrite(i, low);
-			}
-			led_i++;
-		}
-		digitalWrite(pin_D4, low);
-		Delay_Ms(250);
-		count++;
-	}
-}
diff --git a/examples/GPIO_analogRead/README.md b/examples/GPIO_analogRead/README.md
deleted file mode 100644
index 3b9e1b6ca6799c77987e830cf7ea868d095601b5..0000000000000000000000000000000000000000
--- a/examples/GPIO_analogRead/README.md
+++ /dev/null
@@ -1,17 +0,0 @@
-# GPIO Libaray
-On the shoulders of the Blink and the adc_polled example, this Arduino-like GPIO + ADC library stands.
-
-All pins are adressable as outputs, inputs, with pull-up, etc. but now you can also read the eight muxed inputs.
-The pins are in an enum, so you can call them by their name and iterate over them.
-
-It has been extended by an arduino-like analogRead function.
-
-It's your responsibility to not blow up a pin.
-Only use one pin for one thing and you should be fine.
-
-# GPIO Example
-Connect LED + 1k resistor to each pin (C0 to C7 and D4) and GND.
-Connect a 10k pot between GND and VCC, wiper to D6.
-Marvel at the colorful glory.
-
-https://user-images.githubusercontent.com/104343143/231814680-d41ae68f-dc7b-4c9c-a3c7-0b88cc82e541.mp4
diff --git a/examples/blink/blink.bin b/examples/blink/blink.bin
index 9d2f625331af46afe752e4c674ea3ca6a67b5f49..b2c6174d1dac1759b26f345f4dde42f709e0e59e 100755
Binary files a/examples/blink/blink.bin and b/examples/blink/blink.bin differ
diff --git a/examples/bootload/bootload.c b/examples/bootload/bootload.c
index a3c781e69ef5bee6ff64dc581728f39343c5d5c1..67847cfb6486c83be5a87f0fd220cb6895afb2e9 100644
--- a/examples/bootload/bootload.c
+++ b/examples/bootload/bootload.c
@@ -58,7 +58,7 @@ int main()
 		GPIOC->BSHR = 1<<16;                     // Turn off GPIOC0
 	}
 
-	for( i = 0; i < 5; i++ )
+	for( i = 0; i < 3; i++ )
 	{
 		GPIOD->BSHR = 1 | (1<<4);
 		GPIOC->BSHR = 1;
diff --git a/examples/GPIO_analogRead/Makefile b/examples/iwdg/Makefile
similarity index 50%
rename from examples/GPIO_analogRead/Makefile
rename to examples/iwdg/Makefile
index a965d90a0e3e624237b8b7234cfce7e09475c44e..0d17f3d3669e18df049b73815420d5a4c11f55f9 100644
--- a/examples/GPIO_analogRead/Makefile
+++ b/examples/iwdg/Makefile
@@ -1,12 +1,10 @@
 all : flash
 
-TARGET:=GPIO_analogRead
-
-CFLAGS+=-DTINYVECTOR
-ADDITIONAL_C_FILES+=../../extralibs/wiring.c
+TARGET:=iwdg
 
 include ../../ch32v003fun/ch32v003fun.mk
 
 flash : cv_flash
 clean : cv_clean
 
+
diff --git a/examples/iwdg/iwdg.c b/examples/iwdg/iwdg.c
new file mode 100644
index 0000000000000000000000000000000000000000..886f2778eedfa6d29a06c33b9ea204e2c8769554
--- /dev/null
+++ b/examples/iwdg/iwdg.c
@@ -0,0 +1,73 @@
+// Could be defined here, or in the processor defines.
+#define SYSTEM_CORE_CLOCK 48000000
+
+#include "ch32v003fun.h"
+#include <stdio.h>
+
+static void iwdg_setup(uint16_t reload_val, uint8_t prescaler) {
+	IWDG->CTLR = 0x5555;
+	IWDG->PSCR = prescaler;
+
+	IWDG->CTLR = 0x5555;
+	IWDG->RLDR = reload_val & 0xfff;
+
+	IWDG->CTLR = 0xCCCC;
+}
+
+static void iwdg_feed() {
+	IWDG->CTLR = 0xAAAA;
+}
+
+static void gpios_on() {
+	GPIOD->BSHR = 1 | (1<<4);
+	GPIOC->BSHR = 1;
+}
+
+static void gpios_off() {
+	GPIOD->BSHR = (1<<16) | (1<<(16+4));
+	GPIOC->BSHR = (1<<16);
+}
+
+int main()
+{
+	SystemInit48HSI();
+
+	// Enable GPIOs
+	RCC->APB2PCENR |= RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOC;
+
+	// GPIO D0 Push-Pull
+	GPIOD->CFGLR &= ~(0xf<<(4*0));
+	GPIOD->CFGLR |= (GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*0);
+
+	// GPIO D4 Push-Pull
+	GPIOD->CFGLR &= ~(0xf<<(4*4));
+	GPIOD->CFGLR |= (GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*4);
+
+	// GPIO C0 Push-Pull
+	GPIOC->CFGLR &= ~(0xf<<(4*0));
+	GPIOC->CFGLR |= (GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*0);
+
+	gpios_on();
+	Delay_Ms( 1500 );
+	gpios_off();
+	Delay_Ms( 1000 );
+
+	// set up watchdog to about 4 s
+	iwdg_setup(0xfff, IWDG_Prescaler_128);
+
+	gpios_on();
+	Delay_Ms( 3000 );
+	gpios_off();
+
+	// feed the watch dog. Now there should be about 8 blinks
+	iwdg_feed();
+
+	while(1)
+	{
+		gpios_on();
+		Delay_Ms( 250 );
+		gpios_off();
+		Delay_Ms( 250 );
+	}
+}
+
diff --git a/examples/optiondata/Makefile b/examples/optiondata/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..5ad2b8e5ed62673531a142e2a44fa1e7ebf78b08
--- /dev/null
+++ b/examples/optiondata/Makefile
@@ -0,0 +1,8 @@
+all : flash
+
+TARGET:=optiondata
+
+include ../../ch32v003fun/ch32v003fun.mk
+
+flash : cv_flash
+clean : cv_clean
diff --git a/examples/optiondata/README.md b/examples/optiondata/README.md
new file mode 100644
index 0000000000000000000000000000000000000000..840aee6057895eb3696b9e18407e37190a9f87cf
--- /dev/null
+++ b/examples/optiondata/README.md
@@ -0,0 +1,11 @@
+# Write to the user fields in the Option Data flash
+
+This is a simple example code for writing to the two 8-bit data0/data1 bytes that are a part of the Flash "User-selected words" (aka Option bytes).
+
+To reduce the code footpint no timeouts are implemented in the code. It simply waits for the busy-flag to be cleaed. The two wait-loops could be replaced with a Delay_Ms(10) if speed is not an issue.
+
+The two bytes could be used for remembering user settings between power-offs.
+
+After flashing you can test it with the command
+`../../minichlink/minichlink -a -b -T` 
+that will Halt, Reboot and enter Terminal mode. For each run the count will increment by one.
diff --git a/examples/optiondata/optiondata.c b/examples/optiondata/optiondata.c
new file mode 100644
index 0000000000000000000000000000000000000000..a3c8f273c0a07d9416ff30963cacea91651b6b17
--- /dev/null
+++ b/examples/optiondata/optiondata.c
@@ -0,0 +1,74 @@
+//
+// Example code for writing to the two 8-bit data0/data1 bytes that are
+// a part of the Flash "User-selected words" (aka Option bytes).
+// To reduce the code footpint no timeouts are implemented in the code. It simply
+// waits for the busy-flag to be cleaed. The two wait-loops could be replaced 
+// with a Delay_Ms(10) if speed is not an issue.
+//
+// June 13, 2023 Mats Engstrom (github.com/mengstr)
+//
+
+#define SYSTEM_CORE_CLOCK 48000000
+
+#include "ch32v003fun.h"
+#include <stdio.h>
+void FlashOptionData(uint8_t data0, uint8_t data1) {
+	volatile uint16_t hold[6]; 		// array to hold current values while erasing
+
+	// The entire 64 byte data block of the "User-selected words" will be erased
+	// so we need to keep a copy of the content for re-writing after erase.
+	// Save a few (20) bytes code space by moving 32 bits at a time.
+	// 			hold[0]=OB->RDPR;
+	// 			hold[1]=OB->USER;
+	// 			hold[2]=data0;
+	// 			hold[3]=data1;
+	// 			hold[4]=OB->WRPR0;
+	// 			hold[5]=OB->WRPR1;
+	uint32_t *hold32p=(uint32_t *)hold;
+	uint32_t *ob32p=(uint32_t *)OB_BASE;
+	hold32p[0]=ob32p[0]; 			// Copy RDPR and USER
+	hold32p[1]=data0+(data1<<16);	// Copy in the two Data values to be written
+	hold32p[2]=ob32p[2];			// Copy WRPR0 and WEPR1
+
+	// Unlock both the general Flash and the User-selected words
+	FLASH->KEYR = FLASH_KEY1;
+	FLASH->KEYR = FLASH_KEY2;
+	FLASH->OBKEYR = FLASH_KEY1;
+	FLASH->OBKEYR = FLASH_KEY2;
+
+	FLASH->CTLR |= CR_OPTER_Set;			// OBER RW Perform user-selected word erasure	
+	FLASH->CTLR |= CR_STRT_Set;    			// STRT RW1 Start. Set 1 to start an erase action,hw automatically clears to 0
+	while (FLASH->STATR & FLASH_BUSY);		// Wait for flash operation to be done
+	FLASH->CTLR &= CR_OPTER_Reset; 			// Disable erasure mode	
+
+	// Write the held values back one-by-one
+	FLASH->CTLR |= CR_OPTPG_Set;   			// OBG  RW Perform user-selected word programming
+	uint16_t *ob16p=(uint16_t *)OB_BASE;
+	for (int i=0;i<sizeof(hold)/sizeof(hold[0]); i++) {
+		ob16p[i]=hold[i];
+		while (FLASH->STATR & FLASH_BUSY);	// Wait for flash operation to be done
+	}
+	FLASH->CTLR &= CR_OPTPG_Reset;			// Disable programming mode
+
+	FLASH->CTLR|=CR_LOCK_Set;				// Lock flash memories again
+
+	return;
+}
+
+
+
+//
+//
+//
+int main() {
+	SystemInit48HSI();
+	SetupDebugPrintf();
+	Delay_Ms(250);
+	
+	uint8_t bootcnt=OB->Data0;
+	bootcnt++;
+	FlashOptionData(bootcnt,0);
+	printf("Boot count is %d\n",bootcnt);
+
+	for(;;);
+}
diff --git a/examples/tim2_pwm_remap/Makefile b/examples/tim2_pwm_remap/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..36df10e860825f2e0d005debbe3cbcb791b2b591
--- /dev/null
+++ b/examples/tim2_pwm_remap/Makefile
@@ -0,0 +1,10 @@
+all : flash
+
+TARGET:=tim2_pwm_remap
+
+
+include ../../ch32v003fun/ch32v003fun.mk
+
+flash : cv_flash
+clean : cv_clean
+
diff --git a/examples/tim2_pwm_remap/tim2_pwm_remap.c b/examples/tim2_pwm_remap/tim2_pwm_remap.c
new file mode 100644
index 0000000000000000000000000000000000000000..1d2c4bbfa43fab930c8ccdbd69b776b7e84e33dd
--- /dev/null
+++ b/examples/tim2_pwm_remap/tim2_pwm_remap.c
@@ -0,0 +1,175 @@
+/*
+ * Example for using AFIO to remap peripheral outputs to alternate configuration
+ * 06-01-2023 B. Roy, based on previous work by:
+ * 03-28-2023 E. Brombaugh
+ * 05-29-2023 recallmenot adapted from Timer1 to Timer2
+ *
+ * Usage: 
+ * Connect LEDs between PD3 and GND, PD4 and GND, PC1 and GND, and PC7 and GND
+ * Observe activity on PD3 and PD4, then activity on PC1 and PC7, and back
+ *
+ * Nutshell:
+ * 1. Ensure you're providing a clock to the AFIO peripheral! Save yourself an 
+ * 	hour of troubleshooting!
+ *	RCC->APB2PCENR |= RCC_APB2Periph_AFIO
+ * 2. Apply the remapping configuration bits to the AFIO register:
+ * 	AFIO->PCFR1 |= AFIO_PCFR1_TIM2_REMAP_FULLREMAP
+ * 3. Go on about your business.
+ *
+ * /
+
+
+Timer 2 pin mappings by AFIO->PCFR1
+	00	AFIO_PCFR1_TIM2_REMAP_NOREMAP
+		D4		T2CH1ETR
+		D3		T2CH2
+		C0		T2CH3
+		D7		T2CH4  --note: requires disabling nRST in opt
+	01	AFIO_PCFR1_TIM2_REMAP_PARTIALREMAP1
+		C5		T2CH1ETR_
+		C2		T2CH2_
+		D2		T2CH3_
+		C1		T2CH4_
+	10	AFIO_PCFR1_TIM2_REMAP_PARTIALREMAP2
+		C1		T2CH1ETR_
+		D3		T2CH2
+		C0		T2CH3
+		D7		T2CH4  --note: requires disabling nRST in opt
+	11	AFIO_PCFR1_TIM2_REMAP_FULLREMAP
+		C1		T2CH1ETR_
+		C7		T2CH2_
+		D6		T2CH3_
+		D5		T2CH4_
+*/
+
+// Could be defined here, or in the processor defines.
+#define SYSTEM_CORE_CLOCK 48000000
+#define APB_CLOCK SYSTEM_CORE_CLOCK
+
+#include "ch32v003fun.h"
+#include <stdio.h>
+
+/******************************************************************************************
+ * initialize TIM2 for PWM
+ ******************************************************************************************/
+void t2pwm_init( void )
+{
+	// Enable GPIOC, GPIOD, TIM2, and AFIO *very important!*
+	RCC->APB2PCENR |= RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOC;
+	RCC->APB1PCENR |= RCC_APB1Periph_TIM2;
+
+	// PD4 is T2CH1, 10MHz Output alt func, push-pull (also works in oepn drain OD_AF)
+	GPIOD->CFGLR &= ~(0xf<<(4*4));
+	GPIOD->CFGLR |= (GPIO_Speed_10MHz | GPIO_CNF_OUT_PP_AF)<<(4*4);
+
+	// PD3 is T2CH2, 10MHz Output alt func, push-pull (also works in oepn drain OD_AF)
+	GPIOD->CFGLR &= ~(0xf<<(4*3));
+	GPIOD->CFGLR |= (GPIO_Speed_10MHz | GPIO_CNF_OUT_PP_AF)<<(4*3);
+
+	// PC1 is T2CH1_, 10MHz Output alt func, push-pull (also works in oepn drain OD_AF)
+	GPIOC->CFGLR &= ~(0xf<<(4*1));
+	GPIOC->CFGLR |= (GPIO_Speed_10MHz | GPIO_CNF_OUT_PP_AF)<<(4*1);
+
+	// PC7 is T2CH2_, 10MHz Output alt func, push-pull (also works in oepn drain OD_AF)
+	GPIOC->CFGLR &= ~(0xf<<(4*7));
+	GPIOC->CFGLR |= (GPIO_Speed_10MHz | GPIO_CNF_OUT_PP_AF)<<(4*7);
+	
+	// Reset TIM2 to init all regs
+	RCC->APB1PRSTR |= RCC_APB1Periph_TIM2;
+	RCC->APB1PRSTR &= ~RCC_APB1Periph_TIM2;
+	
+	// SMCFGR: default clk input is CK_INT
+	// set TIM2 clock prescaler divider 
+	TIM2->PSC = 0x0000;
+	// set PWM total cycle width
+	TIM2->ATRLR = 255;
+	
+	// for channel 1 and 2, let CCxS stay 00 (output), set OCxM to 110 (PWM I)
+	// enabling preload causes the new pulse width in compare capture register only to come into effect when UG bit in SWEVGR is set (= initiate update) (auto-clears)
+	TIM2->CHCTLR1 |= TIM_OC1M_2 | TIM_OC1M_1 | TIM_OC1PE;
+	TIM2->CHCTLR1 |= TIM_OC2M_2 | TIM_OC2M_1 | TIM_OC2PE;
+
+	// CTLR1: default is up, events generated, edge align
+	// enable auto-reload of preload
+	TIM2->CTLR1 |= TIM_ARPE;
+
+	// Enable CH1 output, positive pol
+	TIM2->CCER |= TIM_CC1E | TIM_CC1P;
+	// Enable CH2 output, positive pol
+	TIM2->CCER |= TIM_CC2E | TIM_CC2P;
+
+	// initialize counter
+	TIM2->SWEVGR |= TIM_UG;
+
+	// Enable TIM2
+	TIM2->CTLR1 |= TIM_CEN;
+}
+
+/*****************************************************************************************
+ * set timer channel PW
+ *****************************************************************************************/
+void t2pwm_setpw(uint8_t chl, uint16_t width)
+{
+	switch(chl&3)
+	{
+		case 0: TIM2->CH1CVR = width; break;
+		case 1: TIM2->CH2CVR = width; break;
+		case 2: TIM2->CH3CVR = width; break;
+		case 3: TIM2->CH4CVR = width; break;
+	}
+	TIM2->SWEVGR |= TIM_UG; // load new value in compare capture register
+}
+
+/*****************************************************************************************
+ * Remap T1CH1/T1CH2 from PD4/PD3 to PC1/PC7
+ *
+ * Can remap on-the fly; no need to re-initialize timers, reset GPIO mode/config, etc.
+ *
+ * Leaves the previous pins configured as 'alternate function' mode - i.e. disconnected
+ * from the GPIO peripheral, and floating.
+ *
+ *****************************************************************************************/
+void ToggleRemap(void) {
+	if(AFIO->PCFR1 & AFIO_PCFR1_TIM2_REMAP_FULLREMAP) {
+		AFIO->PCFR1 &= AFIO_PCFR1_TIM2_REMAP_NOREMAP;   //clear remapping bits
+		printf("Standard Mapping!\r\n");
+	}
+	else {
+		AFIO->PCFR1 |= AFIO_PCFR1_TIM2_REMAP_FULLREMAP; //set fullremap mode
+		printf("Full Remapping!\r\n");
+	}
+};
+
+/*****************************************************************************************
+ * entry
+ *****************************************************************************************/
+int main()
+{
+	uint32_t count = 0;
+	
+	SystemInit48HSI();
+
+	// start serial @ default 115200bps
+	SetupDebugPrintf();
+
+	Delay_Ms( 100 );
+	printf("\r\r\n\ntim2_pwm example, with remap\n\r");
+
+	// init TIM2 for PWM
+	printf("initializing tim2...");
+	t2pwm_init();
+	printf("done.\n\r");
+		
+	printf("looping...\n\r");
+	
+	while(1)
+	{
+		for(;count<255;count++){
+			t2pwm_setpw(0, count);		// Chl 1
+			t2pwm_setpw(1, 255-count);	// Chl 2 180° out-of-phase
+			Delay_Ms( 5 );
+		}
+		count = 0;
+		ToggleRemap();
+	}
+}
diff --git a/examples/ws2812bdemo/ws2812bdemo.c b/examples/ws2812bdemo/ws2812bdemo.c
index 517dca241884adee0ae2aa9430a0b739da911f5a..2f462d0f1cbddba7e7a399299c752c58d45c98f8 100644
--- a/examples/ws2812bdemo/ws2812bdemo.c
+++ b/examples/ws2812bdemo/ws2812bdemo.c
@@ -2,6 +2,8 @@
 #define SYSTEM_CORE_CLOCK 48000000
 #define APB_CLOCK SYSTEM_CORE_CLOCK
 
+// NOTE: CONNECT WS2812's to PC6
+
 #include "ch32v003fun.h"
 #include <stdio.h>
 #include <string.h>
diff --git a/extralibs/ch32v003_GPIO_branchless.h b/extralibs/ch32v003_GPIO_branchless.h
new file mode 100644
index 0000000000000000000000000000000000000000..728ee001044175d82084a7c25c478f5723630345
--- /dev/null
+++ b/extralibs/ch32v003_GPIO_branchless.h
@@ -0,0 +1,476 @@
+// 2023-06-07 recallmenot
+
+//######## necessities
+
+// include guards
+#ifndef CH32V003_GPIO_BR_H
+#define CH32V003_GPIO_BR_H
+
+// includes
+#include <stdint.h>								//uintN_t support
+#include "../ch32v003fun/ch32v003fun.h"
+
+
+
+/*######## library description
+This is a speedy and light GPIO library due to
+	static inlining of most functions
+	compile-time abstraction
+	branchless where it counts
+*/
+
+
+
+/*######## library usage and configuration
+
+first, enable the desired port.
+
+digital usage is quite Arduino-like:
+pinMode
+digitalWrite
+digitalWrite_lo
+digitalWrite_hi
+digitalRead
+
+
+
+analog-to-digital usage is almost Arduino-like:
+pinMode
+ADCinit
+analogRead
+
+By default, this library inserts a delay of 300 µs between configuration of the ADC input mux and the time the conversion starts.
+This serves to counteract the high input impedance of the ADC, especially if it is increased by external resistors.
+The input impedance of port A appears to be especially large.
+You may modify it to your liking using the following define before including this library.
+#define GPIO_ADC_MUX_DELAY 1200
+
+GPIO_ADC_sampletime controls the time each conversion is granted, by default it is GPIO_ADC_sampletime_241cy_default, all options originate from the GPIO_ADC_sampletimes enum.
+To alter it, you have 3 options:
+ * `#define GPIO_ADC_sampletime GPIO_ADC_sampletime_43cy` before including this library
+ * call the GPIO_ADC_set_sampletime function-like macro to momentarrily set it for one channel
+ * call the GPIO_ADC_set_sampletimes_all function-like macro to to momentarrily set it for all channels
+
+You may also disable the ADC to save power between infrequent measurements.
+
+
+
+digital-to-analog (PWM) usage is quite different:
+pinMode
+GPIO_timX_map
+GPIO_timX_init
+GPIO_timX_enableCH
+GPIO_timX_analogWrite
+
+This is due to the fact that the CH32V003 has 2 timers, which each can be connected to 4 pre-defined sets (mappings) of pins.
+Then you address the 4 channels of the timers, instead of the pins.
+
+By default, the timers will be configured to count up to 2^10, which is 10 bits or 1024 discrete steps.
+You may alter this to suit your needs, for example to an 8 bit resolution (256 discrete steps).
+Insert this before including this library:
+#define GPIO_timer_resolution (1 << 8)
+
+By default, the timers will operate with a clock prescaler of 2 but you may choose 1 or 4 if you wish to alter the speed.
+Insert this before including this library:
+#define GPIO_timer_prescaler TIM_CKD_DIV1;		// APB_CLOCK / 1024 / 1 = 46.9kHz
+
+You may calculate the base frequency of the timer (the rate of repetition of your signal) like follows:
+fpwm = APB_CLOCK / resolution / prescaler
+This puts the defaults at an inaudible 23.4kHz.
+The higher the frequency, the greater the EMI radiation will be.
+With low frequencies, say below 1000Hz, LEDs may exhibit perceivable flicker.
+
+Since this library enables compare capture preload (OCxPE of CHCTLRy), writing a value into the compare register using analogWrite will automatically apply it (=load into shadow register) when the timer starts its next cycle.
+This avoids a bug whereby writing a compare value lower than the current counter value, the output will glitch high for the next cycle, resulting in flickery updates.
+Writing `TIMx->SWEVGR |= TIM_UG` will immediately update the shadow register and cause the same issue.
+
+*/
+
+
+
+//######## ports, pins and states: use these for the functions below!
+
+enum GPIO_port_n {
+	GPIO_port_A = 0b00,
+	GPIO_port_C = 0b10,
+	GPIO_port_D = 0b11,
+};
+
+enum GPIO_pinModes {
+	GPIO_pinMode_I_floating,
+	GPIO_pinMode_I_pullUp,
+	GPIO_pinMode_I_pullDown,
+	GPIO_pinMode_I_analog,
+	GPIO_pinMode_O_pushPull,
+	GPIO_pinMode_O_openDrain,
+	GPIO_pinMode_O_pushPullMux,
+	GPIO_pinMode_O_openDrainMux,
+};
+
+enum lowhigh {
+	low,
+	high,
+};
+
+// analog inputs
+enum GPIO_analog_inputs {
+	GPIO_Ain0_A2,
+	GPIO_Ain1_A1,
+	GPIO_Ain2_C4,
+	GPIO_Ain3_D2,
+	GPIO_Ain4_D3,
+	GPIO_Ain5_D5,
+	GPIO_Ain6_D6,
+	GPIO_Ain7_D4,
+	GPIO_AinVref,
+	GPIO_AinVcal,
+};
+
+// how many cycles the ADC shall sample the input for (speed vs precision)
+enum GPIO_ADC_sampletimes {
+	GPIO_ADC_sampletime_3cy,
+	GPIO_ADC_sampletime_9cy,
+	GPIO_ADC_sampletime_15cy,
+	GPIO_ADC_sampletime_30cy,
+	GPIO_ADC_sampletime_43cy,
+	GPIO_ADC_sampletime_57cy,
+	GPIO_ADC_sampletime_73cy,
+	GPIO_ADC_sampletime_241cy_default,
+};
+
+enum GPIO_tim1_output_sets {
+	GPIO_tim1_output_set_0__D2_A1_C3_C4__D0_A2_D1,
+	GPIO_tim1_output_set_1__C6_C7_C0_D3__C3_C4_D1,
+	GPIO_tim1_output_set_2__D2_A1_C3_C4__D0_A2_D1,
+	GPIO_tim1_output_set_3__C4_C7_C5_D4__C3_D2_C6,
+};
+
+enum GPIO_tim2_output_sets {
+	GPIO_tim2_output_set_0__D4_D3_C0_D7,
+	GPIO_tim2_output_set_1__C5_C2_D2_C1,
+	GPIO_tim2_output_set_2__C1_D3_C0_D7,
+	GPIO_tim2_output_set_3__C1_C7_D6_D5,
+};
+
+
+
+//######## interface function overview: use these!
+// most functions have been reduced to function-like macros, actual definitions downstairs
+
+// setup
+#define GPIO_portEnable(GPIO_port_n)
+#define GPIO_pinMode(GPIO_port_n, pin, pinMode, GPIO_Speed)
+
+// digital
+#define GPIO_digitalWrite_hi(GPIO_port_n, pin)
+#define GPIO_digitalWrite_lo(GPIO_port_n, pin)
+#define GPIO_digitalWrite(GPIO_port_n, pin, lowhigh)
+#define GPIO_digitalWrite_branching(GPIO_port_n, pin, lowhigh)
+#define GPIO_digitalRead(GPIO_port_n, pin)
+
+// analog to digital
+static inline void GPIO_ADCinit();
+#define GPIO_ADC_set_sampletime(GPIO_analog_input, GPIO_ADC_sampletime)
+#define GPIO_ADC_set_sampletimes_all(GPIO_ADC_sampletime)
+#define GPIO_ADC_set_power(enable)
+#define GPIO_ADC_calibrate()
+static inline uint16_t GPIO_analogRead(enum GPIO_analog_inputs input);
+
+// digital to analog (PWM)
+#define GPIO_tim1_map(GPIO_tim1_output_set)
+#define GPIO_tim2_map(GPIO_tim2_output_set)
+static inline void GPIO_tim1_init();
+static inline void GPIO_tim2_init();
+#define GPIO_tim1_enableCH(channel)
+#define GPIO_tim2_enableCH(channel)
+#define GPIO_tim1_analogWrite(channel, value)
+#define GPIO_tim2_analogWrite(channel, value)
+
+
+
+//######## internal function declarations
+
+
+
+//######## internal variables
+
+
+
+//######## preprocessor macros
+
+#define CONCAT(a, b) a ## b
+#define CONCAT_INDIRECT(a, b) CONCAT(a, b)
+
+#define GPIOx_to_port_n2(GPIOx)				GPIOx_to_port_n_##GPIOx
+#define GPIOx_to_port_n(GPIOx)				GPIOx_to_port_n2(GPIOx)
+#define GPIOx_to_port_n_GPIO_port_A			0b00
+#define GPIOx_to_port_n_GPIO_port_C			0b10
+#define GPIOx_to_port_n_GPIO_port_D			0b11
+
+#define GPIO_port_n_to_GPIOx2(GPIO_port_n)		GPIO_port_n_to_GPIOx_##GPIO_port_n
+#define GPIO_port_n_to_GPIOx(GPIO_port_n)		GPIO_port_n_to_GPIOx2(GPIO_port_n)
+#define GPIO_port_n_to_GPIOx_GPIO_port_A		GPIOA
+#define GPIO_port_n_to_GPIOx_GPIO_port_C		GPIOC
+#define GPIO_port_n_to_GPIOx_GPIO_port_D		GPIOD
+
+#define GPIO_port_n_to_RCC_APB2Periph2(GPIO_port_n)	GPIO_port_n_to_RCC_APB2Periph_##GPIO_port_n
+#define GPIO_port_n_to_RCC_APB2Periph(GPIO_port_n)	GPIO_port_n_to_RCC_APB2Periph2(GPIO_port_n)
+#define GPIO_port_n_to_RCC_APB2Periph_GPIO_port_A	RCC_APB2Periph_GPIOA
+#define GPIO_port_n_to_RCC_APB2Periph_GPIO_port_C	RCC_APB2Periph_GPIOC
+#define GPIO_port_n_to_RCC_APB2Periph_GPIO_port_D	RCC_APB2Periph_GPIOD
+
+#define GPIO_pinMode_to_CFG2(GPIO_pinMode, GPIO_Speed)				GPIO_pinMode_to_CFG_##GPIO_pinMode(GPIO_Speed)
+#define GPIO_pinMode_to_CFG(GPIO_pinMode, GPIO_Speed)				GPIO_pinMode_to_CFG2(GPIO_pinMode, GPIO_Speed)
+#define GPIO_pinMode_to_CFG_GPIO_pinMode_I_floating(GPIO_Speed)			(GPIO_SPEED_IN	| GPIO_CNF_IN_FLOATING)
+#define GPIO_pinMode_to_CFG_GPIO_pinMode_I_pullUp(GPIO_Speed)			(GPIO_SPEED_IN	| GPIO_CNF_IN_PUPD)
+#define GPIO_pinMode_to_CFG_GPIO_pinMode_I_pullDown(GPIO_Speed)			(GPIO_SPEED_IN	| GPIO_CNF_IN_PUPD)
+#define GPIO_pinMode_to_CFG_GPIO_pinMode_I_analog(GPIO_Speed)			(GPIO_SPEED_IN	| GPIO_CNF_IN_ANALOG)
+#define GPIO_pinMode_to_CFG_GPIO_pinMode_O_pushPull(GPIO_Speed)			(GPIO_Speed	| GPIO_CNF_OUT_PP)
+#define GPIO_pinMode_to_CFG_GPIO_pinMode_O_openDrain(GPIO_Speed)		(GPIO_Speed	| GPIO_CNF_OUT_OD)
+#define GPIO_pinMode_to_CFG_GPIO_pinMode_O_pushPullMux(GPIO_Speed)		(GPIO_Speed	| GPIO_CNF_OUT_PP_AF)
+#define GPIO_pinMode_to_CFG_GPIO_pinMode_O_openDrainMux(GPIO_Speed)		(GPIO_Speed	| GPIO_CNF_IN_ANALOG)
+
+#define GPIO_pinMode_set_PUPD2(GPIO_pinMode, GPIO_port_n, pin)			GPIO_pinMode_set_PUPD_##GPIO_pinMode(GPIO_port_n, pin)
+#define GPIO_pinMode_set_PUPD(GPIO_pinMode, GPIO_port_n, pin)			GPIO_pinMode_set_PUPD2(GPIO_pinMode, GPIO_port_n, pin)
+#define GPIO_pinMode_set_PUPD_GPIO_pinMode_I_floating(GPIO_port_n, pin)
+#define GPIO_pinMode_set_PUPD_GPIO_pinMode_I_pullUp(GPIO_port_n, pin)		GPIO_port_n_to_GPIOx(GPIO_port_n)->BSHR = (1 << pin)
+#define GPIO_pinMode_set_PUPD_GPIO_pinMode_I_pullDown(GPIO_port_n, pin)		GPIO_port_n_to_GPIOx(GPIO_port_n)->BSHR = (1 << (pin + 16))
+#define GPIO_pinMode_set_PUPD_GPIO_pinMode_I_analog(GPIO_port_n, pin)
+#define GPIO_pinMode_set_PUPD_GPIO_pinMode_O_pushPull(GPIO_port_n, pin)
+#define GPIO_pinMode_set_PUPD_GPIO_pinMode_O_openDrain(GPIO_port_n, pin)
+#define GPIO_pinMode_set_PUPD_GPIO_pinMode_O_pushPullMux(GPIO_port_n, pin)
+#define GPIO_pinMode_set_PUPD_GPIO_pinMode_O_openDrainMux(GPIO_port_n, pin)
+
+#if !defined(GPIO_ADC_MUX_DELAY)
+#define GPIO_ADC_MUX_DELAY 200
+#endif
+
+#if !defined(GPIO_ADC_sampletime)
+#define GPIO_ADC_sampletime GPIO_ADC_sampletime_241cy_default
+#endif
+
+#if !defined(GPIO_timer_resolution)
+#define GPIO_timer_resolution (1 << 10)
+#endif
+
+#if !defined(GPIO_timer_prescaler)
+#define GPIO_timer_prescaler TIM_CKD_DIV2		// APB_CLOCK / 1024 / 2 = 23.4kHz
+#endif
+
+// maintenance define
+#if !defined(SYSTEM_CORE_CLOCK)
+#define SYSTEM_CORE_CLOCK 48000000
+#define APB_CLOCK SYSTEM_CORE_CLOCK
+#endif
+
+
+
+//######## define requirements / maintenance defines
+
+
+
+//######## small function definitions, static inline
+
+
+#undef GPIO_portEnable
+#define GPIO_portEnable(GPIO_port_n) RCC->APB2PCENR |= GPIO_port_n_to_RCC_APB2Periph(GPIO_port_n);
+
+#undef GPIO_pinMode
+#define GPIO_pinMode(GPIO_port_n, pin, pinMode, GPIO_Speed) ({							\
+	GPIO_port_n_to_GPIOx(GPIO_port_n)->CFGLR &= ~(0b1111 << (4 * pin));					\
+	GPIO_port_n_to_GPIOx(GPIO_port_n)->CFGLR |= (GPIO_pinMode_to_CFG(pinMode, GPIO_Speed) << (4 * pin));	\
+	GPIO_pinMode_set_PUPD(pinMode, GPIO_port_n, pin);							\
+})
+
+#undef GPIO_digitalWrite_hi
+#define GPIO_digitalWrite_hi(GPIO_port_n, pin)		GPIO_port_n_to_GPIOx(GPIO_port_n)->BSHR = (1 << pin)
+#undef GPIO_digitalWrite_lo
+#define GPIO_digitalWrite_lo(GPIO_port_n, pin)		GPIO_port_n_to_GPIOx(GPIO_port_n)->BSHR = (1 << (pin + 16))
+
+#undef GPIO_digitalWrite
+#define GPIO_digitalWrite2(GPIO_port_n, pin, lowhigh)	GPIO_digitalWrite_##lowhigh(GPIO_port_n, pin)
+#define GPIO_digitalWrite(GPIO_port_n, pin, lowhigh)	GPIO_digitalWrite2(GPIO_port_n, pin, lowhigh)
+#define GPIO_digitalWrite_low(GPIO_port_n, pin)		GPIO_digitalWrite_lo(GPIO_port_n, pin)
+#define GPIO_digitalWrite_0(GPIO_port_n, pin)		GPIO_digitalWrite_lo(GPIO_port_n, pin)
+#define GPIO_digitalWrite_high(GPIO_port_n, pin)	GPIO_digitalWrite_hi(GPIO_port_n, pin)
+#define GPIO_digitalWrite_1(GPIO_port_n, pin)		GPIO_digitalWrite_hi(GPIO_port_n, pin)
+
+#undef GPIO_digitalWrite_branching
+#define GPIO_digitalWrite_branching(GPIO_port_n, pin, lowhigh)		(lowhigh ? GPIO_digitalWrite_hi(GPIO_port_n, pin) : GPIO_digitalWrite_lo(GPIO_port_n, pin))
+
+#undef GPIO_digitalRead
+#define GPIO_digitalRead(GPIO_port_n, pin)	 	((GPIO_port_n_to_GPIOx(GPIO_port_n)->INDR >> pin) & 0b1)
+
+
+#undef GPIO_ADC_set_sampletime
+// 0:7 => 3/9/15/30/43/57/73/241 cycles
+#define GPIO_ADC_set_sampletime(GPIO_analog_input, GPIO_ADC_sampletime) ({	\
+	ADC1->SAMPTR2 &= ~(0b111) << (3 * GPIO_analog_input);			\
+	ADC1->SAMPTR2 |= GPIO_ADC_sampletime << (3 * GPIO_analog_input);	\
+})
+
+#undef GPIO_ADC_set_sampletimes_all
+#define GPIO_ADC_set_sampletimes_all(GPIO_ADC_sampletime) ({	\
+	ADC1->SAMPTR2 &= 0;					\
+	ADC1->SAMPTR2 |=					\
+			GPIO_ADC_sampletime << (0 * 3)		\
+		|	GPIO_ADC_sampletime << (1 * 3)		\
+		|	GPIO_ADC_sampletime << (2 * 3)		\
+		|	GPIO_ADC_sampletime << (3 * 3)		\
+		|	GPIO_ADC_sampletime << (4 * 3)		\
+		|	GPIO_ADC_sampletime << (5 * 3)		\
+		|	GPIO_ADC_sampletime << (6 * 3)		\
+		|	GPIO_ADC_sampletime << (7 * 3)		\
+		|	GPIO_ADC_sampletime << (8 * 3)		\
+		|	GPIO_ADC_sampletime << (9 * 3);		\
+	ADC1->SAMPTR1 &= 0;					\
+	ADC1->SAMPTR1 |=					\
+			GPIO_ADC_sampletime << (0 * 3)		\
+		|	GPIO_ADC_sampletime << (1 * 3)		\
+		|	GPIO_ADC_sampletime << (2 * 3)		\
+		|	GPIO_ADC_sampletime << (3 * 3)		\
+		|	GPIO_ADC_sampletime << (4 * 3)		\
+		|	GPIO_ADC_sampletime << (5 * 3);		\
+})
+
+#undef GPIO_ADC_set_power
+#define GPIO_ADC_set_power2(enable) GPIO_ADC_set_power_##enable
+#define GPIO_ADC_set_power(enable) GPIO_ADC_set_power2(enable)
+#define GPIO_ADC_set_power_1 ADC1->CTLR2 |= ADC_ADON
+#define GPIO_ADC_set_power_0 ADC1->CTLR2 &= ~(ADC_ADON)
+
+#undef GPIO_ADC_calibrate
+#define GPIO_ADC_calibrate() ({			\
+	ADC1->CTLR2 |= ADC_RSTCAL;		\
+	while(ADC1->CTLR2 & ADC_RSTCAL);	\
+	ADC1->CTLR2 |= ADC_CAL;			\
+	while(ADC1->CTLR2 & ADC_CAL);		\
+})
+
+// large but will likely only ever be called once
+static inline void GPIO_ADCinit() {
+	// select ADC clock source
+	// ADCCLK = 24 MHz => RCC_ADCPRE = 0: divide by 2
+	RCC->CFGR0 &= ~(0x1F<<11);
+
+	// enable clock to the ADC
+	RCC->APB2PCENR |= RCC_APB2Periph_ADC1;
+
+	// Reset the ADC to init all regs
+	RCC->APB2PRSTR |= RCC_APB2Periph_ADC1;
+	RCC->APB2PRSTR &= ~RCC_APB2Periph_ADC1;
+
+	// set sampling time for all inputs to 241 cycles
+	GPIO_ADC_set_sampletimes_all(GPIO_ADC_sampletime);
+
+	// set trigger to software
+	ADC1->CTLR2 |= ADC_EXTSEL;
+
+	// pre-clear conversion queue
+	ADC1->RSQR1 = 0;
+	ADC1->RSQR2 = 0;
+	ADC1->RSQR3 = 0;
+
+	// power the ADC
+	GPIO_ADC_set_power(1);
+	GPIO_ADC_calibrate();
+}
+
+static inline uint16_t GPIO_analogRead(enum GPIO_analog_inputs input) {
+	// set mux to selected input
+	ADC1->RSQR3 = input;
+	// allow everything to precharge
+	Delay_Us(GPIO_ADC_MUX_DELAY);
+	// start sw conversion (auto clears)
+	ADC1->CTLR2 |= ADC_SWSTART;
+	// wait for conversion complete
+	while(!(ADC1->STATR & ADC_EOC)) {}
+	// get result
+	return ADC1->RDATAR;
+}
+
+
+
+#undef GPIO_tim1_map
+#define GPIO_tim1_map(GPIO_tim1_output_set) ({					\
+	RCC->APB2PCENR |= RCC_APB2Periph_AFIO;					\
+	AFIO->PCFR1 |= ((GPIO_tim1_output_set & 0b11) << 6);			\
+})
+
+#undef GPIO_tim2_map
+#define GPIO_tim2_map(GPIO_tim2_output_set) ({					\
+	RCC->APB2PCENR |= RCC_APB2Periph_AFIO;					\
+	AFIO->PCFR1 |= ((GPIO_tim2_output_set & 0b11) << 8);			\
+})
+
+static inline void GPIO_tim1_init() {
+	// enable TIM1
+	RCC->APB2PCENR |= RCC_APB2Periph_TIM1;
+	// reset TIM1 to init all regs
+	RCC->APB2PRSTR |= RCC_APB2Periph_TIM1;
+	RCC->APB2PRSTR &= ~RCC_APB2Periph_TIM1;
+	// SMCFGR: default clk input is CK_INT
+	// set clock prescaler divider 
+	TIM1->PSC = GPIO_timer_prescaler;
+	// set PWM total cycle width
+	TIM1->ATRLR = GPIO_timer_resolution;
+	// CTLR1: default is up, events generated, edge align
+	// enable auto-reload of preload
+	TIM1->CTLR1 |= TIM_ARPE;
+	// initialize counter
+	TIM1->SWEVGR |= TIM_UG;
+	// disengage brake
+	TIM1->BDTR |= TIM_MOE;
+	// Enable TIM1
+	TIM1->CTLR1 |= TIM_CEN;
+}
+static inline void GPIO_tim2_init() {
+	// enable TIM2
+	RCC->APB1PCENR |= RCC_APB1Periph_TIM2;
+	// reset TIM2 to init all regs
+	RCC->APB1PRSTR |= RCC_APB1Periph_TIM2;
+	RCC->APB1PRSTR &= ~RCC_APB1Periph_TIM2;
+	// SMCFGR: default clk input is CK_INT
+	// set clock prescaler divider 
+	TIM2->PSC = GPIO_timer_prescaler;
+	// set PWM total cycle width
+	TIM2->ATRLR = GPIO_timer_resolution;
+	// CTLR1: default is up, events generated, edge align
+	// enable auto-reload of preload
+	TIM2->CTLR1 |= TIM_ARPE;
+	// initialize counter
+	TIM2->SWEVGR |= TIM_UG;
+	// Enable TIM2
+	TIM2->CTLR1 |= TIM_CEN;
+}
+
+#define GPIO_timer_channel_set2(timer, channel)		GPIO_timer_channel_set_##channel(timer)
+#define GPIO_timer_channel_set(timer, channel)		GPIO_timer_channel_set2(timer, channel)
+#define GPIO_timer_channel_set_1(timer)			timer->CHCTLR1 |=  (TIM_OCMode_PWM1 | TIM_OCPreload_Enable)
+#define GPIO_timer_channel_set_2(timer)			timer->CHCTLR1 |= ((TIM_OCMode_PWM1 | TIM_OCPreload_Enable) << 8)
+#define GPIO_timer_channel_set_3(timer)			timer->CHCTLR2 |=  (TIM_OCMode_PWM1 | TIM_OCPreload_Enable)
+#define GPIO_timer_channel_set_4(timer)			timer->CHCTLR2 |= ((TIM_OCMode_PWM1 | TIM_OCPreload_Enable) << 8)
+
+#undef GPIO_tim1_enableCH
+#define GPIO_tim1_enableCH(channel) ({						\
+	GPIO_timer_channel_set(TIM1, channel);					\
+	TIM1->CCER |= (TIM_OutputState_Enable) << (4 * (channel - 1));		\
+})
+#undef GPIO_tim2_enableCH
+#define GPIO_tim2_enableCH(channel) ({						\
+	GPIO_timer_channel_set(TIM2, channel);					\
+	TIM2->CCER |= (TIM_OutputState_Enable ) << (4 * (channel - 1));		\
+})
+
+#define GPIO_timer_CVR(channel)		CONCAT_INDIRECT(CH, CONCAT_INDIRECT(channel, CVR))
+
+#undef GPIO_tim1_analogWrite
+#define GPIO_tim1_analogWrite(channel, value) ({				\
+	TIM1->GPIO_timer_CVR(channel) = value;					\
+})
+#undef GPIO_tim2_analogWrite
+#define GPIO_tim2_analogWrite(channel, value) ({				\
+	TIM2->GPIO_timer_CVR(channel) = value;					\
+})
+
+#endif // CH32V003_GPIO_BR_H
diff --git a/extralibs/wiring.c b/extralibs/wiring.c
deleted file mode 100644
index b04f8e46dc07a1832b4332edbc3a0e44b02e427b..0000000000000000000000000000000000000000
--- a/extralibs/wiring.c
+++ /dev/null
@@ -1,238 +0,0 @@
-//#include <stdio.h>
-
-#include "wiring.h"
-#include <stdint.h>
-
-
-
-enum GPIOports getPort (enum GPIOpins pin) {
-	if (pin <= pin_A2) {
-		return port_A;
-	}
-	else if (pin <= pin_C7) {
-		return port_C;
-	}
-	else if (pin <= pin_D7) {
-		return port_D;
-	}
-	return port_none;
-}
-
-
-
-void portEnable(enum GPIOports port) {
-	// Enable GPIOs
-	switch (port) {
-		case port_A:
-			RCC->APB2PCENR |= RCC_APB2Periph_GPIOA;
-			break;
-		case port_C:
-			RCC->APB2PCENR |= RCC_APB2Periph_GPIOC;
-			break;
-		case port_D:
-			RCC->APB2PCENR |= RCC_APB2Periph_GPIOD;
-			break;
-		case port_none:
-			break;
-	}
-}
-
-
-
-void pinMode(enum GPIOpins pin, enum GPIOpinMode mode) {
-	GPIO_TypeDef * GPIOx;
-	uint16_t PinOffset;
-
-	GPIOx = (GPIO_TypeDef *)(((uint8_t*)(GPIOA))+(pin>>3)*0x0400);
-	PinOffset = (pin & 0x7)<<2;
-
-	GPIOx->CFGLR &= ~(0b1111<<PinOffset);							// zero the 4 configuration bits
-	
-	uint8_t target_pin_state = pinState_nochange;					// by default, pin shall retain its state
-
-	uint8_t modeMask = 0;												// configuration mask
-
-	switch (mode) {
-		case pinMode_I_floating:
-			modeMask = GPIO_CNF_IN_FLOATING;
-			break;
-		case pinMode_I_pullUp:
-			modeMask = GPIO_CNF_IN_PUPD;
-			target_pin_state = pinState_high;
-			break;
-		case pinMode_I_pullDown:
-			modeMask = GPIO_CNF_IN_PUPD;
-			target_pin_state = pinState_low;
-			break;
-		case pinMode_I_analog:
-			modeMask = GPIO_CNF_IN_ANALOG;
-			break;
-		case pinMode_O_pushPull:
-			modeMask = GPIO_Speed_10MHz | GPIO_CNF_OUT_PP;
-			break;
-		case pinMode_O_openDrain:
-			modeMask = GPIO_Speed_10MHz | GPIO_CNF_OUT_OD;
-			break;
-		case pinMode_O_pushPullMux:
-			modeMask = GPIO_Speed_10MHz | GPIO_CNF_OUT_PP_AF;
-			break;
-		case pinMode_O_openDrainMux:
-			modeMask = GPIO_Speed_10MHz | GPIO_CNF_OUT_OD_AF;
-			break;
-	}
-
-	// wirte mask to CFGR
-	GPIOx->CFGLR |= modeMask<<PinOffset;
-
-	// set pin state
-	if (target_pin_state > pinState_nochange) {
-		digitalWrite(pin, target_pin_state - 1);
-	}
-}
-
-
-
-void digitalWrite(enum GPIOpins pin, uint8_t value) {
-	// no checks given whether pin is currently being toggled by timer! your output trannys are in your hands! beware the magic smoke!
-	GPIO_TypeDef * GPIOx;
-	uint16_t PinOffset = 0;
-	
-	if (pin <= pin_A2) {
-		GPIOx = GPIOA;
-		PinOffset = pin;
-	}
-	else if (pin <= pin_C7) {
-		GPIOx = GPIOC;
-		PinOffset = (pin - 16);
-	}
-	else if (pin <= pin_D7) {
-		GPIOx = GPIOD;
-		PinOffset = (pin - 24);
-	}
-	else {
-		return;
-	}
-
-	if (value) {
-		GPIOx-> BSHR |= 1 << PinOffset;
-	}
-	else {
-		GPIOx-> BSHR |= 1 << (16 + PinOffset);
-	}
-}
-
-
-
-uint8_t digitalRead(uint8_t pin) {
-	GPIO_TypeDef * GPIOx;
-	uint16_t PinOffset = 0;
-	
-	if (pin <= pin_A2) {
-		GPIOx = GPIOA;
-		PinOffset = pin;
-	}
-	else if (pin <= pin_C7) {
-		GPIOx = GPIOC;
-		PinOffset = (pin - 16);
-	}
-	else if (pin <= pin_D7) {
-		GPIOx = GPIOD;
-		PinOffset = (pin - 24);
-	}
-	else {
-		return 0;
-	}
-
-	int8_t result = (GPIOx->INDR >> PinOffset) & 1;
-	return result;
-}
-
-
-
-
-
-void ADCinit() {
-	// select ADC clock source
-	// ADCCLK = 24 MHz => RCC_ADCPRE = 0: divide by 2
-	RCC->CFGR0 &= ~(0x1F<<11);
-
-	// enable clock to the ADC
-	RCC->APB2PCENR |= RCC_APB2Periph_ADC1;
-
-	// Reset the ADC to init all regs
-	RCC->APB2PRSTR |= RCC_APB2Periph_ADC1;
-	RCC->APB2PRSTR &= ~RCC_APB2Periph_ADC1;
-
-	// set sampling time for all inputs to 241 cycles
-	for (uint8_t i = Ain0_A2; i <= AinVcal; i++) {
-		ADCsetSampletime(i, Ast_241cy_default);
-	}
-
-	// set trigger to software
-	ADC1->CTLR2 |= ADC_EXTSEL;
-
-	// pre-clear conversion queue
-	ADC1->RSQR1 = 0;
-	ADC1->RSQR2 = 0;
-	ADC1->RSQR3 = 0;
-
-	// power the ADC
-	ADCsetPower(1);
-}
-
-
-
-void ADCsetSampletime(enum ANALOGinputs input, enum ANALOGsampletimes time) {
-	// clear
-	ADC1->SAMPTR2 &= ~(0b111)<<(3*input);
-	// set
-	ADC1->SAMPTR2 |= time<<(3*input);	// 0:7 => 3/9/15/30/43/57/73/241 cycles
-}
-
-
-
-void ADCsetPower(uint8_t enable) {
-	if (enable) {
-		ADC1->CTLR2 |= ADC_ADON;
-		if (enable == 1) {
-			// auto-cal each time after turning on the ADC
-			// can be overridden by calling with enable > 1.
-			ADCcalibrate();					
-		}
-	}
-	else {
-		ADC1->CTLR2 &= ~(ADC_ADON);
-	}
-}
-
-
-
-void ADCcalibrate() {
-	// reset calibration
-	ADC1->CTLR2 |= ADC_RSTCAL;
-	while(ADC1->CTLR2 & ADC_RSTCAL);
-	
-	// calibrate
-	ADC1->CTLR2 |= ADC_CAL;
-	while(ADC1->CTLR2 & ADC_CAL);
-}
-
-
-
-// inspired by arduinos analogRead()
-uint16_t analogRead(enum ANALOGinputs input) {
-	// set mux to selected input
-	ADC1->RSQR3 = input;
-
-	// may need a delay right here for the mux to actually finish switching??
-	// Arduino inserts a full ms delay right here!
-	
-	// start sw conversion (auto clears)
-	ADC1->CTLR2 |= ADC_SWSTART;
-	
-	// wait for conversion complete
-	while(!(ADC1->STATR & ADC_EOC));
-	
-	// get result
-	return ADC1->RDATAR;
-}
diff --git a/extralibs/wiring.h b/extralibs/wiring.h
deleted file mode 100644
index 3b7d0d74e0a1a8f1d41fca115b4aaeb3901cc8e2..0000000000000000000000000000000000000000
--- a/extralibs/wiring.h
+++ /dev/null
@@ -1,99 +0,0 @@
-#ifndef WIRING_H
-#define WIRING_H
-
-#include "ch32v003fun.h"
-
-
-
-enum lowhigh {
-	low,
-	high,
-};
-
-
-
-enum GPIOports{
-	port_A,
-	port_C,
-	port_D,
-	port_none,
-};
-
-enum GPIOpins{
-	pin_A1 = 1,
-	pin_A2,
-	pin_C0 = 16,
-	pin_C1,
-	pin_C2,
-	pin_C3,
-	pin_C4,
-	pin_C5,
-	pin_C6,
-	pin_C7,
-	pin_D0 = 24,
-	pin_D1,
-	pin_D2,
-	pin_D3,
-	pin_D4,
-	pin_D5,
-	pin_D6,
-	pin_D7,
-	pin_none,
-};
-
-enum GPIOpinMode {
-	pinMode_I_floating,
-	pinMode_I_pullUp,			//pull-mode + ODR(1)
-	pinMode_I_pullDown,			//pull-mode + ODR(0)
-	pinMode_I_analog,
-	pinMode_O_pushPull,
-	pinMode_O_openDrain,
-	pinMode_O_pushPullMux,
-	pinMode_O_openDrainMux,
-};
-
-enum GPIOpinState {
-	pinState_nochange,
-	pinState_low,
-	pinState_high,
-};
-
-enum ANALOGinputs {
-	Ain0_A2,
-	Ain1_A1,
-	Ain2_C4,
-	Ain3_D2,
-	Ain4_D3,
-	Ain5_D5,
-	Ain6_D6,
-	Ain7_D4,
-	AinVref,
-	AinVcal,
-};
-
-enum ANALOGsampletimes {
-	Ast_3cy,
-	Ast_9cy,
-	Ast_15cy,
-	Ast_30cy,
-	Ast_43cy,
-	Ast_57cy,
-	Ast_73cy,
-	Ast_241cy_default,
-};
-
-
-enum GPIOports getPort (enum GPIOpins pin);
-
-void portEnable(enum GPIOports port);
-void pinMode(enum GPIOpins pin, enum GPIOpinMode mode);
-void digitalWrite(enum GPIOpins pin, uint8_t value);
-uint8_t digitalRead(uint8_t pin);
-
-void ADCinit();
-void ADCsetPower(uint8_t enable);
-void ADCsetSampletime(enum ANALOGinputs input, enum ANALOGsampletimes time);
-void ADCcalibrate();
-uint16_t analogRead(enum ANALOGinputs input);
-
-#endif					// WIRING_H
diff --git a/minichlink/Makefile b/minichlink/Makefile
index 11a95a6422588e7d9695e02cf82acbd784215f58..6d42c72d20536afc93317717bf2fe15f954f0529 100644
--- a/minichlink/Makefile
+++ b/minichlink/Makefile
@@ -9,7 +9,7 @@ C_S:=minichlink.c pgm-wch-linke.c pgm-esp32s2-ch32xx.c nhc-link042.c minichgdb.c
 
 ifeq ($(OS),Windows_NT)
 	LDFLAGS:=-L. -lpthread -lusb-1.0 -lsetupapi -lws2_32
-	CFLAGS:=-Os -s -Wall
+	CFLAGS:=-Os -s -Wall -D_WIN32_WINNT=0x0600
 	TOOLS:=minichlink.exe
 else
 	OS_NAME := $(shell uname -s | tr A-Z a-z)
@@ -23,6 +23,9 @@ else
 		LIBINCLUDES:=$(shell pkg-config --libs-only-L libusb-1.0)
 		INCS:=$(INCLUDES) $(LIBINCLUDES)
 	endif
+
+    # Until it's supported on Windows, add the Ardulink file here.
+    C_S:=$(C_S) ardulink.c
 endif
 
 all : $(TOOLS)
diff --git a/minichlink/ardulink.c b/minichlink/ardulink.c
new file mode 100644
index 0000000000000000000000000000000000000000..5da4d10640b31c44aaa2c8651182aa14aedb8a08
--- /dev/null
+++ b/minichlink/ardulink.c
@@ -0,0 +1,186 @@
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+#include <termios.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <sys/ioctl.h>
+
+#include <errno.h>
+
+#include "minichlink.h"
+
+void * TryInit_Ardulink(void);
+
+static int ArdulinkWriteReg32(void * dev, uint8_t reg_7_bit, uint32_t command);
+static int ArdulinkReadReg32(void * dev, uint8_t reg_7_bit, uint32_t * commandresp);
+static int ArdulinkFlushLLCommands(void * dev);
+static int ArdulinkExit(void * dev);
+static int ArdulinkTargetReset(void * dev, int reset);
+
+
+typedef struct {
+    struct ProgrammerStructBase psb;
+    int fd;
+} ardulink_ctx_t;
+
+int ArdulinkWriteReg32(void * dev, uint8_t reg_7_bit, uint32_t command)
+{
+    uint8_t buf[6];
+    buf[0] = 'w';
+    buf[1] = reg_7_bit;
+
+    //fprintf(stderr, "WriteReg32: 0x%02x = 0x%08x\n", reg_7_bit, command);
+
+    buf[2] = command & 0xff;
+    buf[3] = (command >> 8) & 0xff;
+    buf[4] = (command >> 16) & 0xff;
+    buf[5] = (command >> 24) & 0xff;
+
+    if (write(((ardulink_ctx_t*)dev)->fd, buf, 6) == -1)
+        return -errno;
+
+    if (read(((ardulink_ctx_t*)dev)->fd, buf, 1) == -1)
+        return -errno;
+
+    return buf[0] == '+' ? 0 : -EPROTO;
+}
+
+int ArdulinkReadReg32(void * dev, uint8_t reg_7_bit, uint32_t * commandresp)
+{
+    uint8_t buf[4];
+    buf[0] = 'r';
+    buf[1] = reg_7_bit;
+
+    if (write(((ardulink_ctx_t*)dev)->fd, buf, 2) == -1)
+        return -errno;
+
+    if (read(((ardulink_ctx_t*)dev)->fd, buf, 4) == -1)
+        return -errno;
+
+    *commandresp = (uint32_t)buf[0] | (uint32_t)buf[1] << 8 | \
+        (uint32_t)buf[2] << 16 | (uint32_t)buf[3] << 24;
+
+    //fprintf(stderr, "ReadReg32: 0x%02x = 0x%08x\n", reg_7_bit, *commandresp);
+
+    return 0;
+}
+
+int ArdulinkFlushLLCommands(void * dev)
+{
+    return 0;
+}
+
+int ArdulinkExit(void * dev)
+{
+    close(((ardulink_ctx_t*)dev)->fd);
+    free(dev);
+    return 0;
+}
+
+int ArdulinkTargetReset(void * dev, int reset) {
+    char c;
+
+    fprintf(stderr, "Ardulink: target reset %d\n", reset);
+
+    // Assert reset.
+    c = reset ? 'a' : 'A';
+    if (write(((ardulink_ctx_t*)dev)->fd, &c, 1) == -1)
+        return -errno;
+
+    if (read(((ardulink_ctx_t*)dev)->fd, &c, 1) == -1)
+        return -errno;
+
+    if (c != '+')
+        return -EPROTO;
+
+    usleep(20000);
+    return 0;
+}
+
+void * TryInit_Ardulink(void)
+{
+    ardulink_ctx_t *ctx;
+    struct termios attr;
+    char first;
+    int argp = TIOCM_DTR;
+
+    if (!(ctx = calloc(sizeof(ardulink_ctx_t), 1))) {
+        perror("calloc");
+        return NULL;
+    }
+
+    if ((ctx->fd = open("/dev/ttyACM0", O_RDWR | O_NOCTTY)) == -1) {
+        perror("open");
+        return NULL;
+    }
+
+    if (tcgetattr(ctx->fd, &attr) == -1) {
+        perror("tcgetattr");
+        return NULL;
+    }
+
+    cfmakeraw(&attr);
+    cfsetspeed(&attr, 115200);
+
+    if (tcsetattr(ctx->fd, TCSANOW, &attr) == -1) {
+        perror("tcsetattr");
+        return NULL;
+    }
+
+    // Arduino DTR reset.
+    if (ioctl(ctx->fd, TIOCMBIC, &argp) == -1) {
+        perror("ioctl");
+        return NULL;
+    }
+
+    if (tcdrain(ctx->fd) == -1) {
+        perror("tcdrain");
+        return NULL;
+    }
+
+    if (ioctl(ctx->fd, TIOCMBIS, &argp) == -1) {
+        perror("ioctl");
+        return NULL;
+    }
+
+    if (tcdrain(ctx->fd) == -1) {
+        perror("tcdrain");
+        return NULL;
+    }
+
+    // Flush anything that might be in the RX buffer, we need the sync char.
+    if (tcflush(ctx->fd, TCIFLUSH) == -1) {
+        perror("tcflush");
+        return NULL;
+    }
+
+    // Let the bootloader do its thing.
+    sleep(3);
+
+    if (read(ctx->fd, &first, 1) == -1) {
+        perror("read");
+        return NULL;
+    }
+
+    if (first != '!') {
+        fprintf(stderr, "Ardulink: not the sync character.\n");
+        return NULL;
+    }
+
+    if (ArdulinkTargetReset(ctx, 1) != 0) {
+        fprintf(stderr, "Ardulink: target reset failed.\n");
+        return NULL;
+    }
+
+    fprintf(stderr, "Ardulink: synced.\n");
+
+    MCF.WriteReg32 = ArdulinkWriteReg32;
+	MCF.ReadReg32 = ArdulinkReadReg32;
+    MCF.FlushLLCommands = ArdulinkFlushLLCommands;
+	MCF.Exit = ArdulinkExit;
+    MCF.TargetReset = ArdulinkTargetReset;
+
+	return ctx;
+}
diff --git a/minichlink/minichlink.c b/minichlink/minichlink.c
index 7da01cbb35321e5220716d2db145bd98d4efe08a..7e2e154aa0ad7cb0f62d2ddf8a55ba73a7cf90ea 100644
--- a/minichlink/minichlink.c
+++ b/minichlink/minichlink.c
@@ -12,6 +12,8 @@
 #include "../ch32v003fun/ch32v003fun.h"
 
 #if defined(WINDOWS) || defined(WIN32) || defined(_WIN32)
+#define DISABLE_ARDULINK
+void Sleep(uint32_t dwMilliseconds);
 #else
 #include <unistd.h>
 #endif
@@ -20,6 +22,7 @@
 static int64_t StringToMemoryAddress( const char * number ) __attribute__((used));
 static void StaticUpdatePROGBUFRegs( void * dev ) __attribute__((used));
 static int InternalUnlockBootloader( void * dev ) __attribute__((used));
+int DefaultReadBinaryBlob( void * dev, uint32_t address_to_read_from, uint32_t read_size, uint8_t * blob );
 
 void TestFunction(void * v );
 struct MiniChlinkFunctions MCF;
@@ -43,6 +46,12 @@ void * MiniCHLinkInitAsDLL( struct MiniChlinkFunctions ** MCFO )
 	{
 		fprintf( stderr, "Found B003Fun Bootloader\n" );
 	}
+#ifndef DISABLE_ARDULINK
+	else if ((dev = TryInit_Ardulink()))
+	{
+		fprintf( stderr, "Found Ardulink Programmer\n" );
+	}
+#endif
 	else
 	{
 		fprintf( stderr, "Error: Could not initialize any supported programmers\n" );
@@ -174,6 +183,10 @@ keep_going:
 				if( !MCF.HaltMode || MCF.HaltMode( dev, 0 ) )
 					goto unimplemented;
 				break;
+			case 'A':  // Halt without reboot
+				if( !MCF.HaltMode || MCF.HaltMode( dev, 5 ) )
+					goto unimplemented;
+				break;
 
 			// disable NRST pin (turn it into a GPIO)
 			case 'd':  // see "RSTMODE" in datasheet
@@ -190,6 +203,20 @@ keep_going:
 				else
 					goto unimplemented;
 				break;
+			case 'p': 
+				if( MCF.HaltMode ) MCF.HaltMode( dev, 0 );
+				if( MCF.ConfigureReadProtection )
+					MCF.ConfigureReadProtection( dev, 0 );
+				else
+					goto unimplemented;
+				break;
+			case 'P':
+				if( MCF.HaltMode ) MCF.HaltMode( dev, 0 );
+				if( MCF.ConfigureReadProtection )
+					MCF.ConfigureReadProtection( dev, 1 );
+				else
+					goto unimplemented;
+				break;
 			case 'G':
 			case 'T':
 			{
@@ -208,8 +235,7 @@ keep_going:
 				else
 				{
 					// In case we aren't running already.
-					MCF.HaltMode( dev, 2 );
-
+					//MCF.HaltMode( dev, 2 );
 					//XXX TODO: Why do some programmers start automatically, and others don't? 
 				}
 
@@ -305,7 +331,7 @@ keep_going:
 					goto unimplemented;
 				break;
 			}
-			case 'p':
+			case 'i':
 			{
 				if( MCF.PrintChipInfo )
 					MCF.PrintChipInfo( dev ); 
@@ -328,7 +354,7 @@ keep_going:
 			}
 			case 'r':
 			{
-				if( MCF.HaltMode ) MCF.HaltMode( dev, 0 );
+				if( MCF.HaltMode ) MCF.HaltMode( dev, 5 ); //No need to reboot.
 
 				if( argchar[2] != 0 )
 				{
@@ -352,8 +378,6 @@ keep_going:
 					return -9;
 				}
 
-				// Round up amount.
-				amount = ( amount + 3 ) & 0xfffffffc;
 				FILE * f = 0;
 				int hex = 0;
 				if( strcmp( fname, "-" ) == 0 )
@@ -408,8 +432,6 @@ keep_going:
 			}
 			case 'w':
 			{
-				if( MCF.HaltMode ) MCF.HaltMode( dev, 0 );
-
 				if( argchar[2] != 0 ) goto help;
 				iarg++;
 				argchar = 0; // Stop advancing
@@ -496,6 +518,8 @@ keep_going:
 					exit( -9 );
 				}
 
+				int is_flash = ( offset & 0xff000000 ) == 0x08000000 || ( offset & 0x1FFFF800 ) == 0x1FFFF000;
+				if( MCF.HaltMode ) MCF.HaltMode( dev, is_flash?0:5 );
 
 				if( MCF.WriteBinaryBlob )
 				{
@@ -539,15 +563,17 @@ help:
 	fprintf( stderr, " -u Clear all code flash - by power off (also can unbrick)\n" );
 	fprintf( stderr, " -b Reboot out of Halt\n" );
 	fprintf( stderr, " -e Resume from halt\n" );
-	fprintf( stderr, " -a Place into Halt\n" );
+	fprintf( stderr, " -a Reboot into Halt\n" );
+	fprintf( stderr, " -A Go into Halt without reboot\n" );
 	fprintf( stderr, " -D Configure NRST as GPIO\n" );
 	fprintf( stderr, " -d Configure NRST as NRST\n" );
+	fprintf( stderr, " -i Show chip info\n" );
 	fprintf( stderr, " -s [debug register] [value]\n" );
 	fprintf( stderr, " -m [debug register]\n" );
 	fprintf( stderr, " -T Terminal Only\n" );
 	fprintf( stderr, " -G Terminal + GDB\n" );
-//	fprintf( stderr, " -P Enable Read Protection (UNTESTED)\n" );
-//	fprintf( stderr, " -p Disable Read Protection (UNTESTED)\n" );
+	fprintf( stderr, " -P Enable Read Protection\n" );
+	fprintf( stderr, " -p Disable Read Protection\n" );
 	fprintf( stderr, " -w [binary image to write] [address, decimal or 0x, try0x08000000]\n" );
 	fprintf( stderr, " -r [output binary image] [memory address, decimal or 0x, try 0x08000000] [size, decimal or 0x, try 16384]\n" );
 	fprintf( stderr, "   Note: for memory addresses, you can use 'flash' 'launcher' 'bootloader' 'option' 'ram' and say \"ram+0x10\" for instance\n" );
@@ -637,12 +663,14 @@ static int DefaultWaitForDoneOp( void * dev, int ignore )
 {
 	int r;
 	uint32_t rrv;
+
 	do
 	{
 		r = MCF.ReadReg32( dev, DMABSTRACTCS, &rrv );
 		if( r ) return r;
 	}
 	while( rrv & (1<<12) );
+
 	if( (rrv >> 8 ) & 7 )
 	{
 		if( !ignore )
@@ -956,7 +984,6 @@ static int DefaultWriteWord( void * dev, uint32_t address_to_write, uint32_t dat
 	return ret;
 }
 
-
 int DefaultWriteBinaryBlob( void * dev, uint32_t address_to_write, uint32_t blob_size, uint8_t * blob )
 {
 	// NOTE IF YOU FIX SOMETHING IN THIS FUNCTION PLEASE ALSO UPDATE THE PROGRAMMERS.
@@ -983,7 +1010,7 @@ int DefaultWriteBinaryBlob( void * dev, uint32_t address_to_write, uint32_t blob
 			int r = MCF.BlockWrite64( dev, address_to_write + i, blob + i );
 			if( r )
 			{
-				fprintf( stderr, "Error writing block at memory %08x\n", address_to_write );
+				fprintf( stderr, "Error writing block at memory %08x / Error: %d\n", address_to_write, r );
 				return r;
 			}
 		}
@@ -1019,7 +1046,7 @@ int DefaultWriteBinaryBlob( void * dev, uint32_t address_to_write, uint32_t blob
 				rsofar += 64;
 				if( r )
 				{
-					fprintf( stderr, "Error writing block at memory %08x\n", base );
+					fprintf( stderr, "Error writing block at memory %08x (error = %d)\n", base, r );
 					return r;
 				}
 			}
@@ -1056,23 +1083,31 @@ int DefaultWriteBinaryBlob( void * dev, uint32_t address_to_write, uint32_t blob
 			{
 				MCF.ReadBinaryBlob( dev, base, 64, tempblock );
 
-				MCF.Erase( dev, base, 64, 0 );
-				MCF.WriteWord( dev, 0x40022010, CR_PAGE_PG ); // THIS IS REQUIRED, (intptr_t)&FLASH->CTLR = 0x40022010
-				MCF.WriteWord( dev, 0x40022010, CR_BUF_RST | CR_PAGE_PG );  // (intptr_t)&FLASH->CTLR = 0x40022010
-
 				// Permute tempblock
 				int tocopy = end_o_plus_one_in_block - offset_in_block;
 				memcpy( tempblock + offset_in_block, blob + rsofar, tocopy );
 				rsofar += tocopy;
 
-				int j;
-				for( j = 0; j < 16; j++ )
+				if( MCF.BlockWrite64 ) 
 				{
-					MCF.WriteWord( dev, j*4+base, *(uint32_t*)(tempblock + j * 4) );
-					rsofar += 4;
+					int r = MCF.BlockWrite64( dev, base, tempblock );
+					if( r ) return r;
+				}
+				else
+				{
+					MCF.Erase( dev, base, 64, 0 );
+					MCF.WriteWord( dev, 0x40022010, CR_PAGE_PG ); // THIS IS REQUIRED, (intptr_t)&FLASH->CTLR = 0x40022010
+					MCF.WriteWord( dev, 0x40022010, CR_BUF_RST | CR_PAGE_PG );  // (intptr_t)&FLASH->CTLR = 0x40022010
+
+					int j;
+					for( j = 0; j < 16; j++ )
+					{
+						MCF.WriteWord( dev, j*4+base, *(uint32_t*)(tempblock + j * 4) );
+						rsofar += 4;
+					}
+					MCF.WriteWord( dev, 0x40022014, base );  //0x40022014 -> FLASH->ADDR
+					MCF.WriteWord( dev, 0x40022010, CR_PAGE_PG|CR_STRT_Set ); // 0x40022010 -> FLASH->CTLR
 				}
-				MCF.WriteWord( dev, 0x40022014, base );  //0x40022014 -> FLASH->ADDR
-				MCF.WriteWord( dev, 0x40022010, CR_PAGE_PG|CR_STRT_Set ); // 0x40022010 -> FLASH->CTLR
 				if( MCF.WaitForFlash && MCF.WaitForFlash( dev ) ) goto timedout;
 			}
 			else
@@ -1121,7 +1156,25 @@ int DefaultWriteBinaryBlob( void * dev, uint32_t address_to_write, uint32_t blob
 	}
 
 	MCF.FlushLLCommands( dev );
-	if(MCF.DelayUS) MCF.DelayUS( dev, 100 ); // Why do we need this?
+
+#if 0
+	{
+		uint8_t scratch[blob_size];
+		int rrr = DefaultReadBinaryBlob( dev, address_to_write, blob_size, scratch );
+		int i;
+		printf( "Read op: %d\n", rrr );
+		for( i = 0; i < blob_size; i++ )
+		{
+			if( scratch[i] != blob[i] )
+			{
+				printf( "DISAGREE: %04x\n", i );
+				i = (i & ~0x3f) + 0x40-1;
+			}
+		}
+	}
+#endif
+
+	if(MCF.DelayUS) MCF.DelayUS( dev, 100 ); // Why do we need this? (We seem to need this on the WCH programmers?)
 	return 0;
 timedout:
 	fprintf( stderr, "Timed out\n" );
@@ -1173,7 +1226,7 @@ static int DefaultReadWord( void * dev, uint32_t address_to_read, uint32_t * dat
 		}
 
 		MCF.WriteReg32( dev, DMDATA1, address_to_read );
-		MCF.WriteReg32( dev, DMCOMMAND, 0x00241000 ); // Only execute.
+		MCF.WriteReg32( dev, DMCOMMAND, 0x00241000 ); 
 
 		iss->statetag = STTAG( "RDSQ" );
 		iss->currentstateval = address_to_read;
@@ -1433,13 +1486,15 @@ static int DefaultHaltMode( void * dev, int mode )
 	struct InternalState * iss = (struct InternalState*)(((struct ProgrammerStructBase*)dev)->internal);
 	switch ( mode )
 	{
+	case 5: // Don't reboot.
 	case 0:
 		MCF.WriteReg32( dev, DMSHDWCFGR, 0x5aa50000 | (1<<10) ); // Shadow Config Reg
 		MCF.WriteReg32( dev, DMCFGR, 0x5aa50000 | (1<<10) ); // CFGR (1<<10 == Allow output from slave)
 		MCF.WriteReg32( dev, DMCFGR, 0x5aa50000 | (1<<10) ); // Bug in silicon?  If coming out of cold boot, and we don't do our little "song and dance" this has to be called.
-
 		MCF.WriteReg32( dev, DMCONTROL, 0x80000001 ); // Make the debug module work properly.
-		MCF.WriteReg32( dev, DMCONTROL, 0x80000001 ); // Initiate a halt request.
+		if( mode == 0 ) MCF.WriteReg32( dev, DMCONTROL, 0x80000003 ); // Reboot.
+		MCF.WriteReg32( dev, DMCONTROL, 0x80000001 ); // Re-initiate a halt request.
+
 //		MCF.WriteReg32( dev, DMCONTROL, 0x00000001 ); // Clear Halt Request.  This is recommended, but not doing it seems more stable.
 		// Sometimes, even if the processor is halted but the MSB is clear, it will spuriously start?
 		MCF.FlushLLCommands( dev );
@@ -1474,6 +1529,8 @@ static int DefaultHaltMode( void * dev, int mode )
 		MCF.WriteReg32( dev, DMCONTROL, 0x40000001 ); // resumereq
 		MCF.FlushLLCommands( dev );
 		break;
+	default:
+		fprintf( stderr, "Error: Unknown halt mode %d\n", mode );
 	}
 #if 0
 	int i;
@@ -1743,19 +1800,25 @@ int DefaultConfigureNRSTAsGPIO( void * dev, int one_if_yes_gpio  )
 #endif
 }
 
+int DefaultConfigureReadProtection( void * dev, int one_if_yes_protect  )
+{
+	fprintf( stderr, "Error: DefaultConfigureReadProtection does not work via the programmer here.  Please see the demo \"optionbytes\"\n" );
+	return -5;
+}
+
 int DefaultPrintChipInfo( void * dev )
 {
 	uint32_t reg;
-	MCF.HaltMode( dev, 0 );
-
+	MCF.HaltMode( dev, 5 );
+	
 	if( MCF.ReadWord( dev, 0x1FFFF800, &reg ) ) goto fail;	
-	printf( "USER/RDPR: %08x\n", reg );
-/*	if( MCF.ReadWord( dev, 0x1FFFF804, &reg ) ) goto fail;	
-	printf( "NDATA: %08x\n", reg );
+	printf( "USER/RDPR  : %04x/%04x\n", reg>>16, reg&0xFFFF );
+	if( MCF.ReadWord( dev, 0x1FFFF804, &reg ) ) goto fail;	
+	printf( "DATA1/DATA0: %04x/%04x\n", reg>>16, reg&0xFFFF );
 	if( MCF.ReadWord( dev, 0x1FFFF808, &reg ) ) goto fail;	
-	printf( "WRPR01: %08x\n", reg );
+	printf( "WRPR1/WRPR0: %04x/%04x\n", reg>>16, reg&0xFFFF );
 	if( MCF.ReadWord( dev, 0x1FFFF80c, &reg ) ) goto fail;	
-	printf( "WRPR23: %08x\n", reg );*/
+	printf( "WRPR3/WRPR2: %04x/%04x\n", reg>>16, reg&0xFFFF );
 	if( MCF.ReadWord( dev, 0x1FFFF7E0, &reg ) ) goto fail;
 	printf( "Flash Size: %d kB\n", (reg&0xffff) );
 	if( MCF.ReadWord( dev, 0x1FFFF7E8, &reg ) ) goto fail;	
diff --git a/minichlink/minichlink.exe b/minichlink/minichlink.exe
index b50eaf2bd5a237af60e010f42e93dabd64038bb8..be95741c4b2eb1f14e5805055bedb7a41cab47d1 100644
Binary files a/minichlink/minichlink.exe and b/minichlink/minichlink.exe differ
diff --git a/minichlink/minichlink.h b/minichlink/minichlink.h
index cec456b7f8abe75d0c3d90e03c5a269642fde9d3..37960eacafe4751fdb2424adb80129134697a714 100644
--- a/minichlink/minichlink.h
+++ b/minichlink/minichlink.h
@@ -23,6 +23,7 @@ struct MiniChlinkFunctions
 
 	int (*HaltMode)( void * dev, int mode ); //0 for halt, 1 for reset, 2 for resume
 	int (*ConfigureNRSTAsGPIO)( void * dev, int one_if_yes_gpio );
+	int (*ConfigureReadProtection)( void * dev, int one_if_yes_protect );
 
 	// No boundary or limit rules.  Must support any combination of alignment and size.
 	int (*WriteBinaryBlob)( void * dev, uint32_t address_to_write, uint32_t blob_size, uint8_t * blob );
@@ -77,6 +78,8 @@ struct MiniChlinkFunctions
 
 	int (*WriteByte)( void * dev, uint32_t address_to_write, uint8_t data );
 	int (*ReadByte)( void * dev, uint32_t address_to_read, uint8_t * data );
+
+	int (*TargetReset)( void * dev, int reset );
 };
 
 /** If you are writing a driver, the minimal number of functions you can implement are:
@@ -151,6 +154,7 @@ void * TryInit_WCHLinkE(void);
 void * TryInit_ESP32S2CHFUN(void);
 void * TryInit_NHCLink042(void);
 void * TryInit_B003Fun(void);
+void * TryInit_Ardulink();
 
 // Returns 0 if ok, populated, 1 if not populated.
 int SetupAutomaticHighLevelFunctions( void * dev );
diff --git a/minichlink/pgm-esp32s2-ch32xx.c b/minichlink/pgm-esp32s2-ch32xx.c
index 11d0048daee958797d8e837009331b330fe63365..ef8a721e7c3cbfbaf335c47bb353c666c2156d39 100644
--- a/minichlink/pgm-esp32s2-ch32xx.c
+++ b/minichlink/pgm-esp32s2-ch32xx.c
@@ -100,6 +100,17 @@ int ESPFlushLLCommands( void * dev )
 
 	eps->commandbuffer[0] = 0xad; // Key report ID
 	eps->commandbuffer[eps->commandplace] = 0xff;
+
+#if 0
+	int i;
+	for( i = 0; i < eps->commandplace; i++ )
+	{
+		if( ( i & 0xff ) == 0 ) printf( "\n" );
+		printf( "%02x ", eps->commandbuffer[i] );
+	}
+	printf("\n" );
+#endif
+
 	r = hid_send_feature_report( eps->hd, eps->commandbuffer, 255 );
 	eps->commandplace = 1;
 	if( r < 0 )
@@ -226,21 +237,40 @@ int ESPExit( void * dev )
 
 int ESPBlockWrite64( void * dev, uint32_t address_to_write, uint8_t * data )
 {
+	int writeretry = 0;
 	struct ESP32ProgrammerStruct * eps = (struct ESP32ProgrammerStruct *)dev;
 	ESPFlushLLCommands( dev );
+
+retry:
+
 	Write2LE( eps, 0x0bfe );
 	Write4LE( eps, address_to_write );
 	int i;
+	int timeout = 0;
 	for( i = 0; i < 64; i++ ) Write1( eps, data[i] );
+
 	do
 	{
 		ESPFlushLLCommands( dev );
+		timeout++;
+		if( timeout > 1000 )
+		{
+			fprintf( stderr, "Error: Timed out block-writing 64\n" );
+			return -49;
+		}
 	} while( eps->replylen < 2 );
-	
-	// Not sure why this is needed.
-	ESPWaitForDoneOp( dev, 0 );
 
-	return eps->reply[1];
+	if( eps->reply[1] )
+	{
+		fprintf( stderr, "Error: Got code %d from ESP write algo. %d [%02x %02x %02x]\n", (char)eps->reply[1], eps->replylen, eps->reply[0], eps->reply[1], eps->reply[2] );
+		if( writeretry < 10 )
+		{
+			writeretry++;
+			goto retry;
+		}
+	}
+
+	return (char)eps->reply[1];
 }
 
 int ESPPerformSongAndDance( void * dev )
@@ -342,7 +372,8 @@ int ESPPollTerminal( void * dev, uint8_t * buffer, int maxlen, uint32_t leavefla
 	int rlen = eps->reply[0];
 	if( rlen < 1 ) return -8;
 
-/*
+
+#if 0
 	int i;
 
 	printf( "RESP (ML %d): %d\n", maxlen,eps->reply[0] );
@@ -353,7 +384,8 @@ int ESPPollTerminal( void * dev, uint8_t * buffer, int maxlen, uint32_t leavefla
 		if( (i % 16) == 15 ) printf( "\n" );
 	}
 	printf( "\n" );
-*/
+#endif
+
 	int errc = eps->reply[1];
 	if( errc > 7 ) return -7;
 
diff --git a/minichlink/pgm-wch-linke.c b/minichlink/pgm-wch-linke.c
index e314875464e5545833cd1d8dab7092c723f31f42..2a3e516906f7ca4593bda13fc0cbd99a82d303d6 100644
--- a/minichlink/pgm-wch-linke.c
+++ b/minichlink/pgm-wch-linke.c
@@ -17,8 +17,8 @@ struct LinkEProgrammerStruct
 };
 
 // For non-ch32v003 chips.
-static int LEReadBinaryBlob( void * d, uint32_t offset, uint32_t amount, uint8_t * readbuff );
-static int InternalLinkEHaltMode( void * d, int mode );
+//static int LEReadBinaryBlob( void * d, uint32_t offset, uint32_t amount, uint8_t * readbuff );
+//static int InternalLinkEHaltMode( void * d, int mode );
 //static int LEWriteBinaryBlob( void * d, uint32_t address_to_write, uint32_t len, uint8_t * blob );
 
 #define WCHTIMEOUT 5000
@@ -232,12 +232,6 @@ static int LESetupInterface( void * d )
 	}
         uint32_t target_chip_type = ( rbuff[4] << 4) + (rbuff[5] >> 4);
         fprintf(stderr, "Chip Type: %03x\n", target_chip_type);
-        if( target_chip_type == 0x307 )
-        {
-                fprintf( stderr, "CH32V307 Detected.  Allowing old-flash-mode for operation.\n" );
-                //MCF.WriteBinaryBlob = LEWriteBinaryBlob;
-                MCF.ReadBinaryBlob = LEReadBinaryBlob;
-        }
 
 	// For some reason, if we don't do this sometimes the programmer starts in a hosey mode.
 	MCF.WriteReg32( d, DMCONTROL, 0x80000001 ); // Make the debug module work properly.
@@ -245,7 +239,19 @@ static int LESetupInterface( void * d )
 	MCF.WriteReg32( d, DMCONTROL, 0x80000001 ); // No, really make sure.
 	MCF.WriteReg32( d, DMABSTRACTCS, 0x00000700 ); // Ignore any pending errors.
 	MCF.WriteReg32( d, DMABSTRACTAUTO, 0 );
-	MCF.WriteReg32( d, DMCOMMAND, 0x00261000 ); // Read x0 (Null command)
+	MCF.WriteReg32( d, DMCOMMAND, 0x00221000 ); // Read x0 (Null command) with nopostexec (to fix v307 read issues)
+
+	int r = 0;
+
+	r |= MCF.WaitForDoneOp( d, 0 );
+	if( r )
+	{
+		fprintf( stderr, "Fault on setup\n" );
+	}
+	else
+	{
+		fprintf( stderr, "Setup success\n" );
+	}
 
 	// This puts the processor on hold to allow the debugger to run.
 	wch_link_command( dev, "\x81\x11\x01\x09", 4, (int*)&transferred, rbuff, 1024 ); // Reply: Chip ID + Other data (see below)
@@ -309,6 +315,21 @@ static int LEConfigureNRSTAsGPIO( void * d, int one_if_yes_gpio )
 	return 0;
 }
 
+static int LEConfigureReadProtection( void * d, int one_if_yes_protect )
+{
+	libusb_device_handle * dev = ((struct LinkEProgrammerStruct*)d)->devh;
+
+	if( one_if_yes_protect )
+	{
+		wch_link_multicommands( (libusb_device_handle *)dev, 2, 11, "\x81\x06\x08\x03\xf7\xff\xff\xff\xff\xff\xff", 4, "\x81\x0b\x01\x01" );
+	}
+	else
+	{
+		wch_link_multicommands( (libusb_device_handle *)dev, 2, 11, "\x81\x06\x08\x02\xf7\xff\xff\xff\xff\xff\xff", 4, "\x81\x0b\x01\x01" );
+	}
+	return 0;
+}
+
 int LEExit( void * d )
 {
 	libusb_device_handle * dev = ((struct LinkEProgrammerStruct*)d)->devh;
@@ -337,6 +358,7 @@ void * TryInit_WCHLinkE()
 	MCF.Control5v = LEControl5v;
 	MCF.Unbrick = LEUnbrick;
 	MCF.ConfigureNRSTAsGPIO = LEConfigureNRSTAsGPIO;
+	MCF.ConfigureReadProtection = LEConfigureReadProtection;
 
 	MCF.Exit = LEExit;
 	return ret;
@@ -385,6 +407,7 @@ const uint8_t * bootloader = (const uint8_t*)
 int bootloader_len = 512;
 #endif
 
+#if 0
 static int InternalLinkEHaltMode( void * d, int mode )
 {
 	libusb_device_handle * dev = ((struct LinkEProgrammerStruct*)d)->devh;
@@ -409,7 +432,9 @@ static int InternalLinkEHaltMode( void * d, int mode )
 	}
 	return 0;
 }
+#endif
 
+#if 0
 static int LEReadBinaryBlob( void * d, uint32_t offset, uint32_t amount, uint8_t * readbuff )
 {
 	libusb_device_handle * dev = ((struct LinkEProgrammerStruct*)d)->devh;
@@ -467,6 +492,7 @@ static int LEReadBinaryBlob( void * d, uint32_t offset, uint32_t amount, uint8_t
 
 	return 0;
 }
+#endif
 
 #if 0
 static int LEWriteBinaryBlob( void * d, uint32_t address_to_write, uint32_t len, uint8_t * blob )
diff --git a/platformio.ini b/platformio.ini
index 263b6ac00e167e52572d7cda8edff404de3f7e12..3edc591904e025923f2883664a83269f1e1840eb 100644
--- a/platformio.ini
+++ b/platformio.ini
@@ -39,9 +39,6 @@ build_src_filter = ${fun_base.build_src_filter} +<examples/external_crystal>
 [env:GPIO]
 build_src_filter = ${fun_base.build_src_filter} ${fun_base.extra_libs_srcs} +<examples/GPIO>
 
-[env:GPIO_analogRead]
-build_src_filter = ${fun_base.build_src_filter} ${fun_base.extra_libs_srcs} +<examples/GPIO_analogRead>
-
 [env:optionbytes]
 build_src_filter = ${fun_base.build_src_filter} +<examples/optionbytes>