From 9ead327348d373eea4b1e79f6c8548e558bbd38c Mon Sep 17 00:00:00 2001
From: eeucalyptus <dev@eeucalyptus.net>
Date: Fri, 15 Sep 2023 16:58:44 +0200
Subject: [PATCH] fix the adc trigger settings
---
examples/adc_fixed_fs/adc_fixed_fs.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/examples/adc_fixed_fs/adc_fixed_fs.c b/examples/adc_fixed_fs/adc_fixed_fs.c
index c69b7ba..758b13c 100644
--- a/examples/adc_fixed_fs/adc_fixed_fs.c
+++ b/examples/adc_fixed_fs/adc_fixed_fs.c
@@ -68,8 +68,7 @@ void init_adc() {
RCC->CFGR0 |= RCC_ADCPRE_DIV2; // set it to 010xx for /2.
// Keep CALVOL register with initial value
- ADC1->CTLR1 |= ADC_ExternalTrigConv_T1_TRGO;
- ADC1->CTLR2 = ADC_ADON | ADC_DMA | ADC_EXTTRIG;
+ ADC1->CTLR2 = ADC_ADON | ADC_DMA | ADC_EXTTRIG | ADC_ExternalTrigConv_T1_TRGO;
// Possible times: 0->3,1->9,2->15,3->30,4->43,5->57,6->73,7->241 cycles
ADC1->SAMPTR2 = 0/*3 cycles*/ << (3/*offset per channel*/ * 2/*channel*/);
--
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