diff --git a/ch32v003fun/ch32v003fun.c b/ch32v003fun/ch32v003fun.c index c81cca93a7219776f2b42e7d39b13aca9fff81a7..d9d66747718121bf4e5b8f48350da66915d93663 100644 --- a/ch32v003fun/ch32v003fun.c +++ b/ch32v003fun/ch32v003fun.c @@ -1175,7 +1175,11 @@ void handle_reset( void ) : : "InterruptVector" (InterruptVector) : "t0", "memory" ); - SETUP_SYSTICK_HCLK +#if defined( FUNCONF_SYSTICK_USE_HCLK ) && FUNCONF_SYSTICK_USE_HCLK && !defined(CH32V10x) + SysTick->CTLR = 5; +#else + SysTick->CTLR = 1; +#endif // set mepc to be main as the root app. asm volatile( @@ -1351,6 +1355,65 @@ void DelaySysTick( uint32_t n ) #endif } +#if defined(CH32V10x) || defined(CH32V20x) || defined(CH32V30x) + +inline uint32_t GetPllClock(uint32_t clock) { +#if !defined(FUNCONF_SYSTEM_CORE_CLOCK) + return 0; +#else +#if defined(FUNCONF_USE_HSI) && FUNCONF_USE_HSI + uint32_t ratio = FUNCONF_SYSTEM_CORE_CLOCK / HSI_VALUE; +#else + uint32_t ratio = FUNCONF_SYSTEM_CORE_CLOCK / HSE_VALUE; +#endif +#if defined(CH32V10x) || defined(CH32V20x) || defined(CH32V30x_D8) + switch(ratio) { + case 1: return 0; + case 2: return RCC_PLLMULL2; + case 3: return RCC_PLLMULL3; + case 4: return RCC_PLLMULL4; + case 5: return RCC_PLLMULL5; + case 6: return RCC_PLLMULL6; + case 7: return RCC_PLLMULL7; + case 8: return RCC_PLLMULL8; + case 9: return RCC_PLLMULL9; + case 10: return RCC_PLLMULL10; + case 11: return RCC_PLLMULL11; + case 12: return RCC_PLLMULL12; + case 13: return RCC_PLLMULL13; + case 14: return RCC_PLLMULL14; + case 15: return RCC_PLLMULL15; + case 16: return RCC_PLLMULL16; +#if defined(CH32V20x) + case 18: return RCC_PLLMULL18; +#endif + default: return 0; + } +#else + switch(ratio) { + case 1: return 0; + case 3: return RCC_PLLMULL3_EXTEN; + case 4: return RCC_PLLMULL4_EXTEN; + case 5: return RCC_PLLMULL5_EXTEN; + case 6: return RCC_PLLMULL6_EXTEN; + case 7: return RCC_PLLMULL7_EXTEN; + case 8: return RCC_PLLMULL8_EXTEN; + case 9: return RCC_PLLMULL9_EXTEN; + case 10: return RCC_PLLMULL10_EXTEN; + case 11: return RCC_PLLMULL11_EXTEN; + case 12: return RCC_PLLMULL12_EXTEN; + case 13: return RCC_PLLMULL13_EXTEN; + case 14: return RCC_PLLMULL14_EXTEN; + case 15: return RCC_PLLMULL15_EXTEN; + case 16: return RCC_PLLMULL16_EXTEN; + default: return 0; + } +#endif +#endif +} + +#endif + void SystemInit() { #if FUNCONF_HSE_BYPASS @@ -1359,11 +1422,15 @@ void SystemInit() #define HSEBYP 0 #endif - #if defined(FUNCONF_USE_PLL) && FUNCONF_USE_PLL - #define BASE_CFGR0 RCC_HPRE_DIV1 | RCC_PLLSRC_HSI_Mul2 // HCLK = SYSCLK = APB1 And, enable PLL - #else - #define BASE_CFGR0 RCC_HPRE_DIV1 // HCLK = SYSCLK = APB1 And, no pll. - #endif +#if defined(FUNCONF_USE_PLL) && FUNCONF_USE_PLL +#if defined(CH32V003) + #define BASE_CFGR0 RCC_HPRE_DIV1 | RCC_PLLSRC_HSI_Mul2 // HCLK = SYSCLK = APB1 And, enable PLL +#else + #define BASE_CFGR0 RCC_HPRE_DIV1 | RCC_PPRE2_DIV1 | RCC_PPRE1_DIV2 | GetPllClock(FUNCONF_SYSTEM_CORE_CLOCK) +#endif +#else + #define BASE_CFGR0 RCC_HPRE_DIV1 // HCLK = SYSCLK = APB1 And, no pll. +#endif #if defined(FUNCONF_USE_HSI) && FUNCONF_USE_HSI #if defined(FUNCONF_USE_PLL) && FUNCONF_USE_PLL @@ -1376,7 +1443,6 @@ void SystemInit() #endif #if defined(FUNCONF_USE_HSE) && FUNCONF_USE_HSE - RCC->CTLR = RCC_HSION | RCC_HSEON | RCC_PLLON | HSEBYP; // Keep HSI and PLL on just in case, while turning on HSE // Values lifted from the EVT. There is little to no documentation on what this does. @@ -1391,11 +1457,13 @@ void SystemInit() #endif #endif +#if defined(CH32V003) || defined(CH32V10x) #if FUNCONF_SYSTEM_CORE_CLOCK > 25000000 FLASH->ACTLR = FLASH_ACTLR_LATENCY_1; //+1 Cycle Latency #else FLASH->ACTLR = FLASH_ACTLR_LATENCY_0; // +0 Cycle Latency #endif +#endif RCC->INTR = 0x009F0000; // Clear PLL, CSSC, HSE, HSI and LSI ready flags. diff --git a/examples_v10x/blink/blink.c b/examples_v10x/blink/blink.c index ba1eecc0acb5d7a9b4d936242139cfa40a7d8388..6d1075502a3b75b309ce006b4497618c531a35c0 100644 --- a/examples_v10x/blink/blink.c +++ b/examples_v10x/blink/blink.c @@ -1,12 +1,9 @@ -// Could be defined here, or in the processor defines. -#define SYSTEM_CORE_CLOCK 80000000 - #include "ch32v003fun.h" #include <stdio.h> int main() { - SystemInit80HSE(); + SystemInit(); // Enable GPIOs //RCC->APB2PCENR |= RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOC; diff --git a/examples_v20x/blink/blink.c b/examples_v20x/blink/blink.c index 65dc911ef952abdd86e2dbd42ddcb39ee9d4751f..7ac84c2866d4507727a01c78d6421f2930ff05e6 100644 --- a/examples_v20x/blink/blink.c +++ b/examples_v20x/blink/blink.c @@ -1,12 +1,9 @@ -// Could be defined here, or in the processor defines. -#define SYSTEM_CORE_CLOCK 144000000 - #include "ch32v003fun.h" #include <stdio.h> int main() { - SystemInit144HSE(); + SystemInit(); // Enable GPIOs //RCC->APB2PCENR |= RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOC; diff --git a/examples_v30x/blink/blink.c b/examples_v30x/blink/blink.c index 65dc911ef952abdd86e2dbd42ddcb39ee9d4751f..7ac84c2866d4507727a01c78d6421f2930ff05e6 100644 --- a/examples_v30x/blink/blink.c +++ b/examples_v30x/blink/blink.c @@ -1,12 +1,9 @@ -// Could be defined here, or in the processor defines. -#define SYSTEM_CORE_CLOCK 144000000 - #include "ch32v003fun.h" #include <stdio.h> int main() { - SystemInit144HSE(); + SystemInit(); // Enable GPIOs //RCC->APB2PCENR |= RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOC;