diff --git a/ch32v003fun/ch32v003fun.c b/ch32v003fun/ch32v003fun.c index f8b435dee492daef0bed69e17bad542cfa5f51a3..4af6ef54580b758f2c9d4c066214bff75a41fc1e 100644 --- a/ch32v003fun/ch32v003fun.c +++ b/ch32v003fun/ch32v003fun.c @@ -1504,7 +1504,7 @@ void SystemInit() #define BASE_CFGR0 RCC_HPRE_DIV1 | RCC_PPRE2_DIV1 | RCC_PPRE1_DIV2 | PLL_MULTIPLICATION #endif #else - #if defined(CH32V003) + #if defined(CH32V003) || defined(CH32X03x) #define BASE_CFGR0 RCC_HPRE_DIV1 // HCLK = SYSCLK = APB1 And, no pll. #else #define BASE_CFGR0 RCC_HPRE_DIV1 | RCC_PPRE2_DIV1 | RCC_PPRE1_DIV1 @@ -1515,6 +1515,17 @@ void SystemInit() #define BASE_CTLR (((FUNCONF_HSITRIM) << 3) | RCC_HSION | HSEBYP | RCC_CSS) //#define BASE_CTLR (((FUNCONF_HSITRIM) << 3) | HSEBYP | RCC_CSS) // disable HSI in HSE modes + // CH32V003 flash latency +#if defined(CH32X03x) + FLASH->ACTLR = FLASH_ACTLR_LATENCY_2; // +2 Cycle Latency (Recommended per TRM) +#elif defined(CH32V003) + #if FUNCONF_SYSTEM_CORE_CLOCK > 25000000 + FLASH->ACTLR = FLASH_ACTLR_LATENCY_1; // +1 Cycle Latency + #else + FLASH->ACTLR = FLASH_ACTLR_LATENCY_0; // +0 Cycle Latency + #endif +#endif + #if defined(FUNCONF_USE_HSI) && FUNCONF_USE_HSI #if defined(CH32V30x) || defined(CH32V20x) || defined(CH32V10x) EXTEN->EXTEN_CTR |= EXTEN_PLL_HSI_PRE; @@ -1557,15 +1568,6 @@ void SystemInit() FLASH->ACTLR |= FLASH_ACTLR_PRFTBE; #endif - // CH32V003 flash latency -#if defined(CH32V003) - #if FUNCONF_SYSTEM_CORE_CLOCK > 25000000 - FLASH->ACTLR = FLASH_ACTLR_LATENCY_1; // +1 Cycle Latency - #else - FLASH->ACTLR = FLASH_ACTLR_LATENCY_0; // +0 Cycle Latency - #endif -#endif - // CH32V10x flash latency #if defined(CH32V10x) #if defined(FUNCONF_USE_HSE) && FUNCONF_USE_HSE diff --git a/ch32v003fun/ch32v003fun.h b/ch32v003fun/ch32v003fun.h index 3b4a530fd3588b3cbb1b50fdc04bdc2ec77de2ea..572f5c7a5787cefc0360d2ce82a85b35baff4942 100644 --- a/ch32v003fun/ch32v003fun.h +++ b/ch32v003fun/ch32v003fun.h @@ -4466,7 +4466,7 @@ typedef struct /* FLASH and Option Bytes Registers */ /******************************************************************************/ -#if defined(CH32V003) || defined(CH32V10x) +#if defined(CH32V003) || defined(CH32V10x) || defined(CH32X03x) /******************* Bit definition for FLASH_ACTLR register ******************/ #define FLASH_ACTLR_LATENCY ((uint8_t)0x03) /* LATENCY[2:0] bits (Latency) */ #define FLASH_ACTLR_LATENCY_0 ((uint8_t)0x00) /* Bit 0 */ diff --git a/examples_x035/blink/blink.c b/examples_x035/blink/blink.c index 234a8c5f8319a9c423c1a309e3283f4ad47a93ae..0a57d204f214c309a70d747b2fc02c612e4f5198 100644 --- a/examples_x035/blink/blink.c +++ b/examples_x035/blink/blink.c @@ -3,7 +3,7 @@ int main() { - //SystemInit(); + SystemInit(); funGpioInitAll();