diff --git a/CyanLight.kicad_pcb b/CyanLight.kicad_pcb
index 5b48a08a60d8a3e7ffae1649e9642e599cfaa076..b43fd52339a2ae4e070f1383ff340b31e6e5ffc5 100644
--- a/CyanLight.kicad_pcb
+++ b/CyanLight.kicad_pcb
@@ -2,10 +2,10 @@
(general
(thickness 1.6)
- (drawings 0)
- (tracks 36)
+ (drawings 3)
+ (tracks 33)
(zones 0)
- (modules 8)
+ (modules 11)
(nets 7)
)
@@ -34,7 +34,12 @@
)
(setup
- (last_trace_width 0.25)
+ (last_trace_width 0.5)
+ (user_trace_width 0.5)
+ (user_trace_width 0.7)
+ (user_trace_width 1.025)
+ (user_trace_width 1.4)
+ (user_trace_width 1.6)
(trace_clearance 0.2)
(zone_clearance 0.508)
(zone_45_only no)
@@ -92,10 +97,10 @@
(net 0 "")
(net 1 GND)
(net 2 "Net-(U1-Pad3)")
- (net 3 "Net-(D1-Pad1)")
- (net 4 Vin)
- (net 5 CSN)
- (net 6 SW)
+ (net 3 Vin)
+ (net 4 SW)
+ (net 5 Anode)
+ (net 6 Cathode)
(net_class Default "This is the default net class."
(clearance 0.2)
@@ -104,171 +109,312 @@
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
- (add_net CSN)
+ (add_net Anode)
+ (add_net Cathode)
(add_net GND)
- (add_net "Net-(D1-Pad1)")
(add_net "Net-(U1-Pad3)")
(add_net SW)
(add_net Vin)
)
- (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 60FDC1E7)
- (at 157 91.5 270)
- (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
- (tags resistor)
- (path /60FD80AA)
- (attr smd)
- (fp_text reference R1 (at 2.5 0) (layer F.SilkS) hide
+ (module TripwireHook_Capacitor:0805_1206_combo (layer F.Cu) (tedit 60FD5082) (tstamp 61034CB6)
+ (at 172.5 89 270)
+ (path /61038131)
+ (fp_text reference C6 (at 0 2.2 90) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value Rs (at 0 1.65 90) (layer F.Fab)
+ (fp_text value 10µF (at 0 -2.05 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12))
- (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12))
- (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1))
- (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1))
- (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1))
- (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1))
(fp_text user %R (at 0 0 90) (layer F.Fab)
- (effects (font (size 0.5 0.5) (thickness 0.08)))
+ (effects (font (size 0.8 0.8) (thickness 0.12)))
)
- (pad 2 smd roundrect (at 0.9125 0 270) (size 1.025 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.243902)
- (net 5 CSN))
- (pad 1 smd roundrect (at -0.9125 0 270) (size 1.025 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.243902)
- (net 4 Vin))
- (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
+ (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -1) (end 1 -1) (layer F.SilkS) (width 0.2))
+ (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1 1) (end 1 1) (layer F.SilkS) (width 0.2))
+ (pad 2 smd roundrect (at 1.25 0 270) (size 1.6 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
+ (net 5 Anode))
+ (pad 1 smd roundrect (at -1.25 0 270) (size 1.6 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
+ (net 6 Cathode))
+ )
+
+ (module TripwireHook_Capacitor:0805_1206_combo locked (layer F.Cu) (tedit 60FD5082) (tstamp 610343C7)
+ (at 145.1 92.8)
+ (path /61032B36)
+ (fp_text reference C2 (at 0 2.2) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
)
+ (fp_text value 10µF (at 0 -2.05) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.12)))
+ )
+ (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -1) (end 1 -1) (layer F.SilkS) (width 0.2))
+ (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1 1) (end 1 1) (layer F.SilkS) (width 0.2))
+ (pad 2 smd roundrect (at 1.25 0) (size 1.6 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
+ (net 1 GND))
+ (pad 1 smd roundrect (at -1.25 0) (size 1.6 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
+ (net 3 Vin))
)
- (module TripwireHook_Capacitor:0805_1206_1812_combo (layer F.Cu) (tedit 60FFD0E6) (tstamp 60FDC187)
- (at 144 90.5 270)
- (path /60FD4E02)
- (fp_text reference C5 (at 0 3 90) (layer F.SilkS) hide
+ (module TripwireHook_Capacitor:0805_1206_combo locked (layer F.Cu) (tedit 60FD5082) (tstamp 610343B6)
+ (at 145.100001 90.3)
+ (path /61032649)
+ (fp_text reference C1 (at 0 2.2) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 10µF (at 0 -2.05) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value 10µF (at 0 -3 90) (layer F.Fab)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.12)))
+ )
+ (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -1) (end 1 -1) (layer F.SilkS) (width 0.2))
+ (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1 1) (end 1 1) (layer F.SilkS) (width 0.2))
+ (pad 2 smd roundrect (at 1.25 0) (size 1.6 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
+ (net 1 GND))
+ (pad 1 smd roundrect (at -1.25 0) (size 1.6 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
+ (net 3 Vin))
+ )
+
+ (module TripwireHook_Inductor:MPIT8040 locked (layer F.Cu) (tedit 6102BF67) (tstamp 60FDC1D6)
+ (at 160.5 85.5 180)
+ (path /60FDCEAC)
+ (fp_text reference L1 (at 0 0 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_line (start -0.3 1.3) (end -0.3 -1.3) (layer F.SilkS) (width 0.2))
- (fp_line (start 0.3 -1.3) (end 0.3 1.3) (layer F.SilkS) (width 0.2))
- (fp_line (start -1.8 1.8) (end 1.7 1.8) (layer F.SilkS) (width 0.2))
- (fp_line (start -1.8 -1.8) (end 1.7 -1.8) (layer F.SilkS) (width 0.2))
- (fp_line (start -2.9 2) (end -2.9 -2) (layer F.CrtYd) (width 0.05))
- (fp_line (start -2.9 -2) (end 2.9 -2) (layer F.CrtYd) (width 0.05))
- (fp_line (start 2.9 2) (end -2.9 2) (layer F.CrtYd) (width 0.05))
- (fp_line (start 2.9 -2) (end 2.9 2) (layer F.CrtYd) (width 0.05))
- (fp_text user "TODO: Evtl. umbauen? Treppenförmig?" (at 1 5 90) (layer Eco1.User)
+ (fp_text value L (at 0 -5.2) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_arc (start -0.8 1.3) (end -0.8 1.8) (angle -90) (layer F.SilkS) (width 0.2))
- (fp_arc (start 0.8 1.3) (end 0.3 1.3) (angle -90) (layer F.SilkS) (width 0.2))
- (fp_arc (start 0.8 -1.3) (end 0.8 -1.8) (angle -90) (layer F.SilkS) (width 0.2))
- (fp_arc (start -0.8 -1.3) (end -0.3 -1.3) (angle -90) (layer F.SilkS) (width 0.2))
- (pad 1 smd roundrect (at -1.6 0 270) (size 2.4 3.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
- (net 4 Vin))
- (pad 2 smd roundrect (at 1.6 0 270) (size 2.4 3.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
+ (fp_poly (pts (xy 2.1 3.9) (xy 1.75 4.25) (xy -1.75 4.25) (xy -2.1 3.9)
+ (xy -1.8 3.6) (xy 1.8 3.6)) (layer F.SilkS) (width 0.2))
+ (fp_poly (pts (xy 2.1 -3.9) (xy 1.75 -3.55) (xy -1.75 -3.55) (xy -2.1 -3.9)
+ (xy -1.8 -4.2) (xy 1.8 -4.2)) (layer F.SilkS) (width 0.2))
+ (fp_line (start 1.75 3.55) (end 1.75 -3.55) (layer F.SilkS) (width 0.2))
+ (fp_line (start -1.75 3.55) (end -1.75 -3.55) (layer F.SilkS) (width 0.2))
+ (fp_line (start -4.35 -3.55) (end -4.35 -3.15) (layer F.SilkS) (width 0.2))
+ (fp_line (start -4 -3.9) (end -4.35 -3.55) (layer F.SilkS) (width 0.2))
+ (fp_line (start -4.35 3.55) (end -4.35 -3.15) (layer F.SilkS) (width 0.2))
+ (fp_line (start -4 3.9) (end -4.35 3.55) (layer F.SilkS) (width 0.2))
+ (fp_line (start 4.35 3.55) (end 4.35 3.15) (layer F.SilkS) (width 0.2))
+ (fp_line (start 4 3.9) (end 4.35 3.55) (layer F.SilkS) (width 0.2))
+ (fp_line (start 4.35 -3.55) (end 4.35 3.15) (layer F.SilkS) (width 0.2))
+ (fp_line (start 4 -3.9) (end 4.35 -3.55) (layer F.SilkS) (width 0.2))
+ (fp_line (start 4 3.9) (end 2.1 3.9) (layer F.SilkS) (width 0.2))
+ (fp_line (start -2.1 3.9) (end -4 3.9) (layer F.SilkS) (width 0.2))
+ (fp_line (start 2.1 -3.9) (end 4 -3.9) (layer F.SilkS) (width 0.2))
+ (fp_line (start -4 -3.9) (end -2.1 -3.9) (layer F.SilkS) (width 0.2))
+ (pad 2 smd roundrect (at 3.05 0 180) (size 2.3 7.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.15)
+ (net 4 SW))
+ (pad 1 smd roundrect (at -3.05 0 180) (size 2.3 7.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.15)
+ (net 6 Cathode))
+ )
+
+ (module TripwireHook_Diode:3W_LED (layer F.Cu) (tedit 6102B67B) (tstamp 60FDC1B5)
+ (at 180.5 89 270)
+ (path /60FDD5EC)
+ (fp_text reference D1 (at 6.7 5.6 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value LED (at -8 4 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -1.9 -4.1) (end -1.9 -4.1) (layer F.SilkS) (width 2.1))
+ (fp_poly (pts (xy -1.8 -3.1) (xy -2.9 -1.2) (xy -2.9 -4) (xy -0.9 -4)
+ (xy -0.9 -3.1)) (layer F.SilkS) (width 0.1))
+ (fp_poly (pts (xy 4.2 -3.8) (xy 4.2 4.2) (xy 2.45 4.85) (xy 0.6 3.25)
+ (xy 3.15 1.8) (xy 3.15 -1.8) (xy 0.6 -3.25) (xy 2.8 -4.7)) (layer F.SilkS) (width 0.1))
+ (fp_line (start 3 4) (end 3.2 4.2) (layer F.SilkS) (width 2.1))
+ (fp_line (start 3 -3.6) (end 3.2 -3.8) (layer F.SilkS) (width 2.1))
+ (fp_line (start -2 4.1) (end -2 4.1) (layer F.SilkS) (width 2.1))
+ (fp_poly (pts (xy -1.8 3.1) (xy -1 3.1) (xy -1 4) (xy -3 4)
+ (xy -3 1)) (layer F.SilkS) (width 0.1))
+ (fp_line (start 8 0) (end -8 0) (layer B.SilkS) (width 2))
+ (fp_line (start -2.54 0) (end -1.27 0) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 1.27) (end 1.27 0) (layer F.Fab) (width 0.1))
+ (fp_line (start 8.55 -3.15) (end 8.55 0.45) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.27 -1.27) (end -1.27 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 0) (end 2.54 0) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.826 1.524) (end 4.826 0.508) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 0) (end 1.27 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -8.55 -0.45) (end -8.55 3.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.27 0) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.318 1.016) (end 5.334 1.016) (layer F.Fab) (width 0.1))
+ (fp_line (start -5.334 -1.016) (end -4.318 -1.016) (layer F.Fab) (width 0.1))
+ (fp_line (start -4.59 -0.45) (end -8.55 -0.45) (layer F.CrtYd) (width 0.05))
+ (fp_circle (center 0 0) (end 4.025 0) (layer F.Fab) (width 0.1))
+ (fp_line (start 8.55 0.45) (end 4.59 0.45) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -8.55 3.15) (end -3.37 3.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 3.37 -3.15) (end 8.55 -3.15) (layer F.CrtYd) (width 0.05))
+ (fp_arc (start 0 0) (end 0 -2.8) (angle -90) (layer Eco1.User) (width 0.12))
+ (fp_arc (start 0 0) (end 4.59 0.45) (angle 131.3332206) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 -2.54 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_arc (start 0 0) (end -4.59 -0.45) (angle 131.3332206) (layer F.CrtYd) (width 0.05))
+ (pad 3 smd custom (at 0 0 300) (size 4 4) (layers F.Cu F.Paste F.Mask)
+ (zone_connect 0)
+ (options (clearance outline) (anchor circle))
+ (primitives
+ (gr_poly (pts
+ (xy 2.82 -1.62) (xy 2.82 1.62) (xy 0 3.24) (xy -2.79 1.62) (xy -2.79 -1.62)
+ (xy 0 -3.24)) (width 0.5))
+ ))
+ (pad 2 smd rect (at 6.35 -1.35 270) (size 3.5 2.7) (layers F.Cu F.Paste F.Mask)
+ (net 5 Anode))
+ (pad 1 smd rect (at -6.35 1.35 270) (size 3.5 2.7) (layers F.Cu F.Paste F.Mask)
+ (net 6 Cathode))
+ )
+
+ (module TripwireHook_Capacitor:0805_1206_combo locked (layer F.Cu) (tedit 60FD5082) (tstamp 60FDC187)
+ (at 145.1 82.8)
+ (path /60FD4E02)
+ (fp_text reference C5 (at 0 2.2) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 10µF (at 0 -2.05) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -1 1) (end 1 1) (layer F.SilkS) (width 0.2))
+ (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1 -1) (end 1 -1) (layer F.SilkS) (width 0.2))
+ (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.12)))
+ )
+ (pad 2 smd roundrect (at 1.25 0) (size 1.6 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
(net 1 GND))
+ (pad 1 smd roundrect (at -1.25 0) (size 1.6 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
+ (net 3 Vin))
)
- (module TripwireHook_Capacitor:0805_1206_1812_combo (layer F.Cu) (tedit 60FFD0E6) (tstamp 60FDC176)
- (at 139.5 90.5 270)
+ (module TripwireHook_Capacitor:0805_1206_combo locked (layer F.Cu) (tedit 60FD5082) (tstamp 60FDC176)
+ (at 145.099999 85.3)
(path /60FD6203)
- (fp_text reference C4 (at 0 3 90) (layer F.SilkS) hide
+ (fp_text reference C4 (at 0 2.2) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value 10µF (at 0 -3 90) (layer F.Fab)
+ (fp_text value 10µF (at 0 -2.05) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_line (start -0.3 1.3) (end -0.3 -1.3) (layer F.SilkS) (width 0.2))
- (fp_line (start 0.3 -1.3) (end 0.3 1.3) (layer F.SilkS) (width 0.2))
- (fp_line (start -1.8 1.8) (end 1.7 1.8) (layer F.SilkS) (width 0.2))
- (fp_line (start -1.8 -1.8) (end 1.7 -1.8) (layer F.SilkS) (width 0.2))
- (fp_line (start -2.9 2) (end -2.9 -2) (layer F.CrtYd) (width 0.05))
- (fp_line (start -2.9 -2) (end 2.9 -2) (layer F.CrtYd) (width 0.05))
- (fp_line (start 2.9 2) (end -2.9 2) (layer F.CrtYd) (width 0.05))
- (fp_line (start 2.9 -2) (end 2.9 2) (layer F.CrtYd) (width 0.05))
- (fp_text user "TODO: Evtl. umbauen? Treppenförmig?" (at 1 5 90) (layer Eco1.User)
- (effects (font (size 1 1) (thickness 0.15)))
+ (fp_line (start -1 1) (end 1 1) (layer F.SilkS) (width 0.2))
+ (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1 -1) (end 1 -1) (layer F.SilkS) (width 0.2))
+ (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.12)))
)
- (fp_arc (start -0.8 1.3) (end -0.8 1.8) (angle -90) (layer F.SilkS) (width 0.2))
- (fp_arc (start 0.8 1.3) (end 0.3 1.3) (angle -90) (layer F.SilkS) (width 0.2))
- (fp_arc (start 0.8 -1.3) (end 0.8 -1.8) (angle -90) (layer F.SilkS) (width 0.2))
- (fp_arc (start -0.8 -1.3) (end -0.3 -1.3) (angle -90) (layer F.SilkS) (width 0.2))
- (pad 1 smd roundrect (at -1.6 0 270) (size 2.4 3.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
- (net 4 Vin))
- (pad 2 smd roundrect (at 1.6 0 270) (size 2.4 3.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
+ (pad 2 smd roundrect (at 1.25 0) (size 1.6 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
(net 1 GND))
+ (pad 1 smd roundrect (at -1.25 0) (size 1.6 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
+ (net 3 Vin))
)
- (module TripwireHook_Capacitor:0805_1206_1812_combo (layer F.Cu) (tedit 60FFD0E6) (tstamp 60FDC165)
- (at 135 90.5 270)
+ (module TripwireHook_Capacitor:0805_1206_combo locked (layer F.Cu) (tedit 60FD5082) (tstamp 60FDC165)
+ (at 145.1 87.8)
(path /60FD656E)
- (fp_text reference C3 (at 0 3 90) (layer F.SilkS) hide
+ (fp_text reference C3 (at 0 2.2) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value 10µF (at 0 -3 90) (layer F.Fab)
+ (fp_text value 10µF (at 0 -2.05) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_line (start -0.3 1.3) (end -0.3 -1.3) (layer F.SilkS) (width 0.2))
- (fp_line (start 0.3 -1.3) (end 0.3 1.3) (layer F.SilkS) (width 0.2))
- (fp_line (start -1.8 1.8) (end 1.7 1.8) (layer F.SilkS) (width 0.2))
- (fp_line (start -1.8 -1.8) (end 1.7 -1.8) (layer F.SilkS) (width 0.2))
- (fp_line (start -2.9 2) (end -2.9 -2) (layer F.CrtYd) (width 0.05))
- (fp_line (start -2.9 -2) (end 2.9 -2) (layer F.CrtYd) (width 0.05))
- (fp_line (start 2.9 2) (end -2.9 2) (layer F.CrtYd) (width 0.05))
- (fp_line (start 2.9 -2) (end 2.9 2) (layer F.CrtYd) (width 0.05))
- (fp_text user "TODO: Evtl. umbauen? Treppenförmig?" (at 1 5 90) (layer Eco1.User)
- (effects (font (size 1 1) (thickness 0.15)))
+ (fp_line (start -1 1) (end 1 1) (layer F.SilkS) (width 0.2))
+ (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1 -1) (end 1 -1) (layer F.SilkS) (width 0.2))
+ (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.12)))
)
- (fp_arc (start -0.8 1.3) (end -0.8 1.8) (angle -90) (layer F.SilkS) (width 0.2))
- (fp_arc (start 0.8 1.3) (end 0.3 1.3) (angle -90) (layer F.SilkS) (width 0.2))
- (fp_arc (start 0.8 -1.3) (end 0.8 -1.8) (angle -90) (layer F.SilkS) (width 0.2))
- (fp_arc (start -0.8 -1.3) (end -0.3 -1.3) (angle -90) (layer F.SilkS) (width 0.2))
- (pad 1 smd roundrect (at -1.6 0 270) (size 2.4 3.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
- (net 4 Vin))
- (pad 2 smd roundrect (at 1.6 0 270) (size 2.4 3.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
+ (pad 2 smd roundrect (at 1.25 0) (size 1.6 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
(net 1 GND))
+ (pad 1 smd roundrect (at -1.25 0) (size 1.6 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217)
+ (net 3 Vin))
)
- (module TripwireHook:MCS0630-6R8MN2 (layer F.Cu) (tedit 601B2719) (tstamp 60FDC1D6)
- (at 160.5 85.5 180)
- (path /60FDCEAC)
- (fp_text reference L1 (at 0 0) (layer F.SilkS)
+ (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 60FDC1E7)
+ (at 157.4 92 270)
+ (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
+ (tags resistor)
+ (path /60FD80AA)
+ (attr smd)
+ (fp_text reference R1 (at 2.5 0) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value L (at 0 4.5) (layer F.Fab) hide
+ (fp_text value Rs (at 0 1.65 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_line (start -3.3 -3.3) (end -3.3 -1.9) (layer F.SilkS) (width 0.12))
- (fp_line (start -3.3 -3.3) (end 3.3 -3.3) (layer F.SilkS) (width 0.12))
- (fp_line (start 3.3 -3.3) (end 3.3 -1.9) (layer F.SilkS) (width 0.12))
- (fp_line (start -3.3 3.3) (end -3.3 1.9) (layer F.SilkS) (width 0.12))
- (fp_line (start 3.3 3.3) (end 3.3 1.9) (layer F.SilkS) (width 0.12))
- (fp_line (start -3.3 3.3) (end 3.3 3.3) (layer F.SilkS) (width 0.12))
- (fp_line (start -3.3 -1.9) (end -1.7 -1.9) (layer F.SilkS) (width 0.12))
- (fp_line (start -1.7 -1.9) (end -1.7 1.9) (layer F.SilkS) (width 0.12))
- (fp_line (start -1.7 1.9) (end -3.3 1.9) (layer F.SilkS) (width 0.12))
- (fp_line (start 3.3 -1.9) (end 1.7 -1.9) (layer F.SilkS) (width 0.12))
- (fp_line (start 1.7 -1.9) (end 1.7 1.9) (layer F.SilkS) (width 0.12))
- (fp_line (start 1.7 1.9) (end 3.3 1.9) (layer F.SilkS) (width 0.12))
- (pad 2 smd rect (at 2.8 0 180) (size 1.9 3.5) (layers F.Cu F.Paste F.Mask)
- (net 6 SW))
- (pad 1 smd rect (at -2.8 0 180) (size 1.9 3.5) (layers F.Cu F.Paste F.Mask)
- (net 3 "Net-(D1-Pad1)"))
+ (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1))
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.08)))
+ )
+ (pad 2 smd roundrect (at 0.9125 0 270) (size 1.025 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.243902)
+ (net 5 Anode))
+ (pad 1 smd roundrect (at -0.9125 0 270) (size 1.025 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.243902)
+ (net 3 Vin))
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
)
- (module TripwireHook_Diode:SMA (layer F.Cu) (tedit 60FDBBE6) (tstamp 60FDC1C4)
- (at 152.000001 85.5 180)
+ (module TripwireHook_Diode:SMA locked (layer F.Cu) (tedit 60FDBBE6) (tstamp 60FDC1C4)
+ (at 151.8 85.5 180)
(path /60FD9D56)
- (fp_text reference D2 (at 0.1 2.85) (layer F.SilkS)
+ (fp_text reference D2 (at 0.1 2.85) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value SK36A (at 0 -2.6) (layer F.Fab)
@@ -285,78 +431,12 @@
(fp_poly (pts (xy 0.50118 -0.79908) (xy 0.500001 -0.79826) (xy 0.50118 0.75032) (xy -0.64944 0.00102)
(xy 0.500001 -0.79826) (xy 0.5 -0.8)) (layer F.SilkS) (width 0.2))
(pad 2 smd trapezoid (at 2.1 0 270) (size 2.5 2.2) (rect_delta 0 0.8 ) (layers F.Cu F.Paste F.Mask)
- (net 6 SW))
+ (net 4 SW))
(pad 1 smd trapezoid (at -2.1 0 270) (size 2.5 2.2) (rect_delta 0 0.8 ) (layers F.Cu F.Paste F.Mask)
- (net 4 Vin))
+ (net 3 Vin))
)
- (module TripwireHook_Connector_Handmade:PinHeader254_01x02 (layer F.Cu) (tedit 6021A393) (tstamp 60FDC1B5)
- (at 172.5 89 270)
- (path /60FDD5EC)
- (fp_text reference D1 (at 2.2 2.4 90) (layer F.SilkS) hide
- (effects (font (size 1 1) (thickness 0.15)))
- )
- (fp_text value LED (at 0 2.4 90) (layer F.Fab)
- (effects (font (size 1 1) (thickness 0.15)))
- )
- (fp_line (start 1.35 -1.4) (end 1.35 1.1) (layer F.SilkS) (width 0.12))
- (fp_line (start -1.25 1.1) (end -1.25 -1.4) (layer F.SilkS) (width 0.12))
- (fp_line (start -1.1 -1.4) (end 0 -1.4) (layer F.SilkS) (width 0.12))
- (fp_line (start -1.1 1.4) (end 1.1 1.4) (layer F.SilkS) (width 0.12))
- (fp_line (start 0.05 -1.4) (end 1.15 -1.4) (layer F.SilkS) (width 0.12))
- (fp_line (start 1.1 -1.4) (end 3.7 -1.4) (layer F.SilkS) (width 0.12))
- (fp_line (start 3.7 -1.4) (end 3.7 1.1) (layer F.SilkS) (width 0.12))
- (fp_line (start 3.7 1.4) (end 1.1 1.4) (layer F.SilkS) (width 0.12))
- (fp_line (start 0.05 -1.4) (end 0 -1.4) (layer F.SilkS) (width 0.12))
- (fp_line (start -1.25 1.1) (end -1.25 1.4) (layer F.SilkS) (width 0.12))
- (fp_line (start 1.35 1.1) (end 1.35 1.4) (layer F.SilkS) (width 0.12))
- (fp_line (start 3.7 1.1) (end 3.7 1.4) (layer F.SilkS) (width 0.12))
- (fp_line (start -1.25 -1.4) (end -1.1 -1.4) (layer F.SilkS) (width 0.12))
- (fp_line (start -1.25 1.4) (end -1.1 1.4) (layer F.SilkS) (width 0.12))
- (fp_poly (pts (xy 0.45 1.4) (xy -1.25 1.4) (xy -1.25 0.45)) (layer F.SilkS) (width 0.1))
- (fp_poly (pts (xy -1 -0.55) (xy -1 0.55) (xy -1.25 0.6) (xy -1.25 -1.4)) (layer F.SilkS) (width 0.1))
- (fp_poly (pts (xy -1 -0.55) (xy -1.25 -1.4) (xy 0.35 -1.4)) (layer F.SilkS) (width 0.1))
- (fp_poly (pts (xy 1.35 -0.4) (xy -0.05 -1.2) (xy 0.25 -1.4) (xy 1.35 -1.4)) (layer F.SilkS) (width 0.1))
- (fp_poly (pts (xy 1.35 1.4) (xy 0.05 1.4) (xy 0 1.15) (xy 1.35 0.4)) (layer F.SilkS) (width 0.1))
- (fp_poly (pts (xy 1.35 0.65) (xy 1 0.65) (xy 1 -0.6) (xy 1.35 -0.6)) (layer F.SilkS) (width 0.1))
- (fp_poly (pts (xy -1 0.55) (xy -1.25 1.4) (xy 0.35 1.4)) (layer B.SilkS) (width 0.1))
- (fp_line (start -1.1 1.4) (end 0 1.4) (layer B.SilkS) (width 0.12))
- (fp_line (start 1.35 1.4) (end 1.35 -1.1) (layer B.SilkS) (width 0.12))
- (fp_poly (pts (xy 1.35 -0.65) (xy 1 -0.65) (xy 1 0.6) (xy 1.35 0.6)) (layer B.SilkS) (width 0.1))
- (fp_line (start -1.25 -1.4) (end -1.1 -1.4) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.25 -1.1) (end -1.25 -1.4) (layer B.SilkS) (width 0.12))
- (fp_line (start 1.1 1.4) (end 3.7 1.4) (layer B.SilkS) (width 0.12))
- (fp_line (start 1.35 -1.1) (end 1.35 -1.4) (layer B.SilkS) (width 0.12))
- (fp_poly (pts (xy -1 0.55) (xy -1 -0.55) (xy -1.25 -0.6) (xy -1.25 1.4)) (layer B.SilkS) (width 0.1))
- (fp_poly (pts (xy 0.45 -1.4) (xy -1.25 -1.4) (xy -1.25 -0.45)) (layer B.SilkS) (width 0.1))
- (fp_line (start 3.7 -1.4) (end 1.1 -1.4) (layer B.SilkS) (width 0.12))
- (fp_line (start 3.7 -1.1) (end 3.7 -1.4) (layer B.SilkS) (width 0.12))
- (fp_line (start 3.7 1.4) (end 3.7 -1.1) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.25 -1.1) (end -1.25 1.4) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.1 -1.4) (end 1.1 -1.4) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.05 1.4) (end 1.15 1.4) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.25 1.4) (end -1.1 1.4) (layer B.SilkS) (width 0.12))
- (fp_poly (pts (xy 1.35 -1.4) (xy 0.05 -1.4) (xy 0 -1.15) (xy 1.35 -0.4)) (layer B.SilkS) (width 0.1))
- (fp_line (start 0.05 1.4) (end 0 1.4) (layer B.SilkS) (width 0.12))
- (fp_poly (pts (xy 1.35 0.4) (xy -0.05 1.2) (xy 0.25 1.4) (xy 1.35 1.4)) (layer B.SilkS) (width 0.1))
- (pad 2 thru_hole oval (at 2.54 0 270) (size 1.524 2.5) (drill 0.762) (layers *.Cu *.Mask)
- (net 5 CSN))
- (pad 1 thru_hole custom (at 0 0 270) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
- (net 3 "Net-(D1-Pad1)") (zone_connect 0)
- (options (clearance outline) (anchor circle))
- (primitives
- (gr_poly (pts
- (xy 0.94 -0.54) (xy 0.94 0.54) (xy 0 1.08) (xy -0.93 0.54) (xy -0.93 -0.54)
- (xy 0 -1.08)) (width 0.01))
- ))
- (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x02_P2.54mm_Vertical.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 -90))
- )
- )
-
- (module Package_TO_SOT_SMD:SOT-89-5_Handsoldering (layer F.Cu) (tedit 5C33D69A) (tstamp 60FAAE25)
+ (module Package_TO_SOT_SMD:SOT-89-5_Handsoldering locked (layer F.Cu) (tedit 5C33D69A) (tstamp 60FAAE25)
(at 151.8 91.45)
(descr "SOT-89-5, http://www.e-devices.ricoh.co.jp/en/products/product_power/pkg/sot-89-5.pdf")
(tags SOT-89-5)
@@ -399,11 +479,11 @@
(pad 3 smd rect (at -2.35 1.5) (size 2.5 0.7) (layers F.Cu F.Paste F.Mask)
(net 2 "Net-(U1-Pad3)"))
(pad 1 smd rect (at -2.35 -1.5) (size 2.5 0.7) (layers F.Cu F.Paste F.Mask)
- (net 6 SW))
+ (net 4 SW))
(pad 4 smd rect (at 2.35 1.5) (size 2.5 0.7) (layers F.Cu F.Paste F.Mask)
- (net 5 CSN))
+ (net 5 Anode))
(pad 5 smd rect (at 2.35 -1.5) (size 2.5 0.7) (layers F.Cu F.Paste F.Mask)
- (net 4 Vin))
+ (net 3 Vin))
(model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-89-5.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@@ -411,41 +491,42 @@
)
)
- (segment (start 135 92.1) (end 139.5 92.1) (width 0.25) (layer F.Cu) (net 1))
- (segment (start 139.5 92.1) (end 144 92.1) (width 0.25) (layer F.Cu) (net 1))
- (segment (start 144 92.1) (end 146.9 92.1) (width 0.25) (layer F.Cu) (net 1))
- (segment (start 147.55 91.45) (end 151.8 91.45) (width 0.25) (layer F.Cu) (net 1))
- (segment (start 146.9 92.1) (end 147.55 91.45) (width 0.25) (layer F.Cu) (net 1))
+ (gr_poly (pts (xy 156.4 84) (xy 155.6 83.2) (xy 156.4 83.2)) (layer F.Cu) (width 0.1))
+ (gr_poly (pts (xy 150.7 89.6) (xy 148.2 89.6) (xy 148.6 83.85) (xy 150.8 86.35)) (layer F.Cu) (width 0))
+ (gr_poly (pts (xy 155.4 89.6) (xy 152.9 89.6) (xy 152.8 87.15) (xy 155 84.65)) (layer F.Cu) (width 0))
+
+ (segment (start 146.45 91.45) (end 146.35 91.55) (width 0.5) (layer F.Cu) (net 1))
+ (segment (start 151.8 91.45) (end 146.45 91.45) (width 0.5) (layer F.Cu) (net 1))
+ (segment (start 146.35 91.55) (end 146.35 92.8) (width 1.6) (layer F.Cu) (net 1))
+ (segment (start 146.35 82.8) (end 146.35 91.55) (width 1.6) (layer F.Cu) (net 1))
(segment (start 148 94.4) (end 148 96) (width 0.25) (layer F.Cu) (net 2))
(segment (start 149.45 92.95) (end 148 94.4) (width 0.25) (layer F.Cu) (net 2))
- (segment (start 169 85.5) (end 172.5 89) (width 0.25) (layer F.Cu) (net 3))
- (segment (start 163.3 85.5) (end 169 85.5) (width 0.25) (layer F.Cu) (net 3))
- (segment (start 154.187504 85.412499) (end 154.100001 85.5) (width 0.25) (layer F.Cu) (net 4))
- (segment (start 156.3625 89.95) (end 157 90.5875) (width 0.25) (layer F.Cu) (net 4))
- (segment (start 154.15 89.95) (end 156.3625 89.95) (width 0.25) (layer F.Cu) (net 4))
- (segment (start 154.100001 89.900001) (end 154.15 89.95) (width 0.25) (layer F.Cu) (net 4))
- (segment (start 154.100001 85.5) (end 154.100001 89.900001) (width 0.25) (layer F.Cu) (net 4))
- (segment (start 157 90.5875) (end 159.4125 90.5875) (width 0.25) (layer F.Cu) (net 4))
- (segment (start 159.4125 90.5875) (end 160.5 89.5) (width 0.25) (layer F.Cu) (net 4))
- (segment (start 160.5 89.5) (end 160.5 82.5) (width 0.25) (layer F.Cu) (net 4))
- (segment (start 160.5 82.5) (end 158.5 80.5) (width 0.25) (layer F.Cu) (net 4))
- (segment (start 158.5 80.5) (end 145.5 80.5) (width 0.25) (layer F.Cu) (net 4))
- (segment (start 145.5 80.5) (end 144 82) (width 0.25) (layer F.Cu) (net 4))
- (segment (start 144 82) (end 144 87) (width 0.25) (layer F.Cu) (net 4))
- (segment (start 135 88.9) (end 139.5 88.9) (width 0.25) (layer F.Cu) (net 4))
- (segment (start 139.5 88.9) (end 144 88.9) (width 0.25) (layer F.Cu) (net 4))
- (segment (start 144 88.9) (end 144 87) (width 0.25) (layer F.Cu) (net 4))
- (segment (start 156.4625 92.95) (end 157 92.4125) (width 0.25) (layer F.Cu) (net 5))
- (segment (start 154.15 92.95) (end 156.4625 92.95) (width 0.25) (layer F.Cu) (net 5))
- (segment (start 171.6275 92.4125) (end 172.5 91.54) (width 0.25) (layer F.Cu) (net 5))
- (segment (start 157 92.4125) (end 171.6275 92.4125) (width 0.25) (layer F.Cu) (net 5))
- (segment (start 157.7 83.2) (end 157.7 85.5) (width 0.25) (layer F.Cu) (net 6))
- (segment (start 157 82.5) (end 157.7 83.2) (width 0.25) (layer F.Cu) (net 6))
- (segment (start 150 82.5) (end 157 82.5) (width 0.25) (layer F.Cu) (net 6))
- (segment (start 149.5 83) (end 150 82.5) (width 0.25) (layer F.Cu) (net 6))
- (segment (start 149.5 85.100001) (end 149.5 83) (width 0.25) (layer F.Cu) (net 6))
- (segment (start 149.900001 85.5) (end 149.5 85.100001) (width 0.25) (layer F.Cu) (net 6))
- (segment (start 149.45 85.950001) (end 149.900001 85.5) (width 0.25) (layer F.Cu) (net 6))
- (segment (start 149.45 89.95) (end 149.45 85.950001) (width 0.25) (layer F.Cu) (net 6))
+ (segment (start 154.187504 85.412499) (end 154.100001 85.5) (width 0.25) (layer F.Cu) (net 3))
+ (segment (start 154.100001 89.900001) (end 154.15 89.95) (width 0.25) (layer F.Cu) (net 3))
+ (segment (start 157.4 90.3) (end 157.4 91.0875) (width 0.7) (layer F.Cu) (net 3))
+ (segment (start 157.05 89.95) (end 157.4 90.3) (width 0.7) (layer F.Cu) (net 3))
+ (segment (start 154.15 85.549999) (end 154.100001 85.5) (width 0.5) (layer F.Cu) (net 3))
+ (segment (start 154.15 89.95) (end 154.15 85.549999) (width 0.7) (layer F.Cu) (net 3))
+ (segment (start 144.7 80.7) (end 143.85 81.55) (width 1.025) (layer F.Cu) (net 3))
+ (segment (start 159.5 80.7) (end 144.7 80.7) (width 1.025) (layer F.Cu) (net 3))
+ (segment (start 160.5 81.7) (end 159.5 80.7) (width 1.025) (layer F.Cu) (net 3))
+ (segment (start 160.5 89.4) (end 160.5 81.7) (width 1.025) (layer F.Cu) (net 3))
+ (segment (start 158.8125 91.0875) (end 160.5 89.4) (width 1.025) (layer F.Cu) (net 3))
+ (segment (start 143.85 81.55) (end 143.85 82.8) (width 1.025) (layer F.Cu) (net 3))
+ (segment (start 157.4 91.0875) (end 158.8125 91.0875) (width 1.025) (layer F.Cu) (net 3))
+ (segment (start 143.85 82.8) (end 143.85 92.8) (width 1.6) (layer F.Cu) (net 3))
+ (segment (start 154.15 89.95) (end 157.05 89.95) (width 0.7) (layer F.Cu) (net 3))
+ (segment (start 149.45 85.950001) (end 149.900001 85.5) (width 0.5) (layer F.Cu) (net 4))
+ (segment (start 150.55 82.55) (end 157.4 82.55) (width 1.6) (layer F.Cu) (net 4))
+ (segment (start 149.7 83.4) (end 150.55 82.55) (width 1.6) (layer F.Cu) (net 4))
+ (segment (start 149.7 85.5) (end 149.7 83.4) (width 1.6) (layer F.Cu) (net 4))
+ (segment (start 149.45 85.75) (end 149.7 85.5) (width 0.5) (layer F.Cu) (net 4))
+ (segment (start 149.45 89.95) (end 149.45 85.75) (width 0.5) (layer F.Cu) (net 4))
+ (segment (start 157.3625 92.95) (end 157.4 92.9125) (width 0.5) (layer F.Cu) (net 5))
+ (segment (start 154.15 92.95) (end 157.3625 92.95) (width 0.7) (layer F.Cu) (net 5))
+ (segment (start 169.6 92.9) (end 172.1 95.4) (width 0.25) (layer F.Cu) (net 5))
+ (segment (start 157.4 92.9) (end 169.6 92.9) (width 0.25) (layer F.Cu) (net 5))
+ (segment (start 168.2 85.5) (end 171.1 82.6) (width 0.25) (layer F.Cu) (net 6))
+ (segment (start 163.3 85.5) (end 168.2 85.5) (width 0.25) (layer F.Cu) (net 6))
)
diff --git a/CyanLight.pro b/CyanLight.pro
index 152769cb7209ca4e1fc17e8154dad5ded6b9d8e4..2cf68c656db3bb40acf2e47eada57af55e6bedf5 100644
--- a/CyanLight.pro
+++ b/CyanLight.pro
@@ -1,29 +1,10 @@
-update=22/05/2015 07:44:53
+update=Do 29 Jul 2021 17:24:41 CEST
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
@@ -31,3 +12,232 @@ NetIExt=net
version=1
LibDir=
[eeschema/libraries]
+[pcbnew]
+version=1
+PageLayoutDescrFile=
+LastNetListRead=
+CopperLayerCount=2
+BoardThickness=1.6
+AllowMicroVias=0
+AllowBlindVias=0
+RequireCourtyardDefinitions=0
+ProhibitOverlappingCourtyards=1
+MinTrackWidth=0.2
+MinViaDiameter=0.4
+MinViaDrill=0.3
+MinMicroViaDiameter=0.2
+MinMicroViaDrill=0.09999999999999999
+MinHoleToHole=0.25
+TrackWidth1=0.25
+TrackWidth2=0.5
+TrackWidth3=0.7
+TrackWidth4=1.025
+TrackWidth5=1.4
+TrackWidth6=1.6
+ViaDiameter1=0.8
+ViaDrill1=0.4
+dPairWidth1=0.2
+dPairGap1=0.25
+dPairViaGap1=0.25
+SilkLineWidth=0.12
+SilkTextSizeV=1
+SilkTextSizeH=1
+SilkTextSizeThickness=0.15
+SilkTextItalic=0
+SilkTextUpright=1
+CopperLineWidth=0.2
+CopperTextSizeV=1.5
+CopperTextSizeH=1.5
+CopperTextThickness=0.3
+CopperTextItalic=0
+CopperTextUpright=1
+EdgeCutLineWidth=0.05
+CourtyardLineWidth=0.05
+OthersLineWidth=0.15
+OthersTextSizeV=1
+OthersTextSizeH=1
+OthersTextSizeThickness=0.15
+OthersTextItalic=0
+OthersTextUpright=1
+SolderMaskClearance=0
+SolderMaskMinWidth=0
+SolderPasteClearance=0
+SolderPasteRatio=-0
+[pcbnew/Layer.F.Cu]
+Name=F.Cu
+Type=0
+Enabled=1
+[pcbnew/Layer.In1.Cu]
+Name=In1.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In2.Cu]
+Name=In2.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In3.Cu]
+Name=In3.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In4.Cu]
+Name=In4.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In5.Cu]
+Name=In5.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In6.Cu]
+Name=In6.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In7.Cu]
+Name=In7.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In8.Cu]
+Name=In8.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In9.Cu]
+Name=In9.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In10.Cu]
+Name=In10.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In11.Cu]
+Name=In11.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In12.Cu]
+Name=In12.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In13.Cu]
+Name=In13.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In14.Cu]
+Name=In14.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In15.Cu]
+Name=In15.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In16.Cu]
+Name=In16.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In17.Cu]
+Name=In17.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In18.Cu]
+Name=In18.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In19.Cu]
+Name=In19.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In20.Cu]
+Name=In20.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In21.Cu]
+Name=In21.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In22.Cu]
+Name=In22.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In23.Cu]
+Name=In23.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In24.Cu]
+Name=In24.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In25.Cu]
+Name=In25.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In26.Cu]
+Name=In26.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In27.Cu]
+Name=In27.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In28.Cu]
+Name=In28.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In29.Cu]
+Name=In29.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In30.Cu]
+Name=In30.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.B.Cu]
+Name=B.Cu
+Type=0
+Enabled=1
+[pcbnew/Layer.B.Adhes]
+Enabled=1
+[pcbnew/Layer.F.Adhes]
+Enabled=1
+[pcbnew/Layer.B.Paste]
+Enabled=1
+[pcbnew/Layer.F.Paste]
+Enabled=1
+[pcbnew/Layer.B.SilkS]
+Enabled=1
+[pcbnew/Layer.F.SilkS]
+Enabled=1
+[pcbnew/Layer.B.Mask]
+Enabled=1
+[pcbnew/Layer.F.Mask]
+Enabled=1
+[pcbnew/Layer.Dwgs.User]
+Enabled=1
+[pcbnew/Layer.Cmts.User]
+Enabled=1
+[pcbnew/Layer.Eco1.User]
+Enabled=1
+[pcbnew/Layer.Eco2.User]
+Enabled=1
+[pcbnew/Layer.Edge.Cuts]
+Enabled=1
+[pcbnew/Layer.Margin]
+Enabled=1
+[pcbnew/Layer.B.CrtYd]
+Enabled=1
+[pcbnew/Layer.F.CrtYd]
+Enabled=1
+[pcbnew/Layer.B.Fab]
+Enabled=1
+[pcbnew/Layer.F.Fab]
+Enabled=1
+[pcbnew/Layer.Rescue]
+Enabled=0
+[pcbnew/Netclasses]
+[pcbnew/Netclasses/Default]
+Name=Default
+Clearance=0.2
+TrackWidth=0.25
+ViaDiameter=0.8
+ViaDrill=0.4
+uViaDiameter=0.3
+uViaDrill=0.1
+dPairWidth=0.2
+dPairGap=0.25
+dPairViaGap=0.25
diff --git a/CyanLight.sch b/CyanLight.sch
index 7aed6601fd7ffbcca9cca65e629de8dd1b64c575..4d32fc36035d39b52a27ad7eb026f7e3de71d8f7 100644
--- a/CyanLight.sch
+++ b/CyanLight.sch
@@ -54,7 +54,7 @@ U 1 1 60FD4E02
P 4500 3250
F 0 "C5" H 4550 3350 50 0000 L CNN
F 1 "10µF" H 4550 3150 50 0000 L CNN
-F 2 "TripwireHook_Capacitor:0805_1206_1812_combo" H 4538 3100 50 0001 C CNN
+F 2 "TripwireHook_Capacitor:0805_1206_combo" H 4538 3100 50 0001 C CNN
F 3 "~" H 4500 3250 50 0001 C CNN
1 4500 3250
1 0 0 -1
@@ -65,7 +65,7 @@ U 1 1 60FD6203
P 4250 3250
F 0 "C4" H 4300 3350 50 0000 L CNN
F 1 "10µF" H 4300 3150 50 0000 L CNN
-F 2 "TripwireHook_Capacitor:0805_1206_1812_combo" H 4288 3100 50 0001 C CNN
+F 2 "TripwireHook_Capacitor:0805_1206_combo" H 4288 3100 50 0001 C CNN
F 3 "~" H 4250 3250 50 0001 C CNN
1 4250 3250
1 0 0 -1
@@ -76,7 +76,7 @@ U 1 1 60FD656E
P 4000 3250
F 0 "C3" H 4050 3350 50 0000 L CNN
F 1 "10µF" H 4050 3150 50 0000 L CNN
-F 2 "TripwireHook_Capacitor:0805_1206_1812_combo" H 4038 3100 50 0001 C CNN
+F 2 "TripwireHook_Capacitor:0805_1206_combo" H 4038 3100 50 0001 C CNN
F 3 "~" H 4000 3250 50 0001 C CNN
1 4000 3250
1 0 0 -1
@@ -128,56 +128,39 @@ Connection ~ 6500 2750
$Comp
L Device:D_Schottky D2
U 1 1 60FD9D56
-P 7400 3000
-F 0 "D2" V 7354 3080 50 0000 L CNN
-F 1 "SK36A" V 7445 3080 50 0000 L CNN
-F 2 "TripwireHook_Diode:SMA" H 7400 3000 50 0001 C CNN
-F 3 "~" H 7400 3000 50 0001 C CNN
- 1 7400 3000
+P 7600 3000
+F 0 "D2" V 7554 3080 50 0000 L CNN
+F 1 "SK36A" V 7645 3080 50 0000 L CNN
+F 2 "TripwireHook_Diode:SMA" H 7600 3000 50 0001 C CNN
+F 3 "~" H 7600 3000 50 0001 C CNN
+ 1 7600 3000
0 1 1 0
$EndComp
Wire Wire Line
- 6250 3350 7400 3350
+ 7600 3350 7600 3250
Wire Wire Line
- 7400 3350 7400 3250
-Wire Wire Line
- 7400 2850 7400 2750
-Wire Wire Line
- 7400 2750 6500 2750
+ 7600 2850 7600 2750
Wire Wire Line
6500 2750 6350 2750
$Comp
L Device:L L1
U 1 1 60FDCEAC
-P 7150 3250
-F 0 "L1" V 7340 3250 50 0000 C CNN
-F 1 "L" V 7249 3250 50 0000 C CNN
-F 2 "TripwireHook:MCS0630-6R8MN2" H 7150 3250 50 0001 C CNN
-F 3 "~" H 7150 3250 50 0001 C CNN
- 1 7150 3250
+P 7350 3250
+F 0 "L1" V 7540 3250 50 0000 C CNN
+F 1 "L" V 7449 3250 50 0000 C CNN
+F 2 "TripwireHook_Inductor:MPIT8040" H 7350 3250 50 0001 C CNN
+F 3 "~" H 7350 3250 50 0001 C CNN
+ 1 7350 3250
0 -1 -1 0
$EndComp
-$Comp
-L Device:LED D1
-U 1 1 60FDD5EC
-P 6750 3250
-F 0 "D1" H 6750 3050 50 0000 C CNN
-F 1 "LED" H 6750 3150 50 0000 C CNN
-F 2 "TripwireHook_Connector_Handmade:PinHeader254_01x02" H 6750 3250 50 0001 C CNN
-F 3 "~" H 6750 3250 50 0001 C CNN
- 1 6750 3250
- -1 0 0 1
-$EndComp
-Wire Wire Line
- 6500 3250 6600 3250
Connection ~ 6500 3250
Wire Wire Line
- 6900 3250 7000 3250
+ 7100 3250 7150 3250
Wire Wire Line
- 7300 3250 7400 3250
-Connection ~ 7400 3250
+ 7500 3250 7600 3250
+Connection ~ 7600 3250
Wire Wire Line
- 7400 3250 7400 3150
+ 7600 3250 7600 3150
$Comp
L power:+24V #PWR03
U 1 1 60FE49CA
@@ -272,10 +255,104 @@ Wire Wire Line
4250 3500 4250 3600
Text GLabel 6350 2850 0 50 Input ~ 0
Vin
-Text GLabel 6500 3450 3 50 Input ~ 0
-CSN
-Text GLabel 7150 3350 3 50 Input ~ 0
+Text GLabel 7350 3350 3 50 Input ~ 0
SW
Wire Wire Line
- 6500 3250 6500 3450
+ 6500 3250 6750 3250
+Wire Wire Line
+ 6500 2750 7600 2750
+Wire Wire Line
+ 6250 3350 7600 3350
+Connection ~ 7150 3250
+Wire Wire Line
+ 7150 3250 7200 3250
+Text GLabel 6650 3700 0 50 Input ~ 0
+Anode
+Text GLabel 7250 3700 2 50 Input ~ 0
+Cathode
+$Comp
+L Device:C C1
+U 1 1 61032649
+P 3750 3250
+F 0 "C1" H 3800 3350 50 0000 L CNN
+F 1 "10µF" H 3800 3150 50 0000 L CNN
+F 2 "TripwireHook_Capacitor:0805_1206_combo" H 3788 3100 50 0001 C CNN
+F 3 "~" H 3750 3250 50 0001 C CNN
+ 1 3750 3250
+ 1 0 0 -1
+$EndComp
+$Comp
+L Device:C C2
+U 1 1 61032B36
+P 4750 3250
+F 0 "C2" H 4800 3350 50 0000 L CNN
+F 1 "10µF" H 4800 3150 50 0000 L CNN
+F 2 "TripwireHook_Capacitor:0805_1206_combo" H 4788 3100 50 0001 C CNN
+F 3 "~" H 4750 3250 50 0001 C CNN
+ 1 4750 3250
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 3750 3100 3750 3000
+Wire Wire Line
+ 3750 3000 4000 3000
+Connection ~ 4000 3000
+Wire Wire Line
+ 4500 3000 4750 3000
+Wire Wire Line
+ 4750 3000 4750 3100
+Connection ~ 4500 3000
+Wire Wire Line
+ 3750 3400 3750 3500
+Wire Wire Line
+ 3750 3500 4000 3500
+Connection ~ 4000 3500
+Wire Wire Line
+ 4500 3500 4750 3500
+Wire Wire Line
+ 4750 3500 4750 3400
+Connection ~ 4500 3500
+$Comp
+L Device:C C6
+U 1 1 61038131
+P 6950 3600
+F 0 "C6" H 7000 3700 50 0000 L CNN
+F 1 "10µF" H 7000 3500 50 0000 L CNN
+F 2 "TripwireHook_Capacitor:0805_1206_combo" H 6988 3450 50 0001 C CNN
+F 3 "~" H 6950 3600 50 0001 C CNN
+ 1 6950 3600
+ 0 1 1 0
+$EndComp
+Connection ~ 6750 3250
+Wire Wire Line
+ 6750 3250 6800 3250
+Wire Wire Line
+ 6750 3600 6800 3600
+Wire Wire Line
+ 6750 3250 6750 3600
+Wire Wire Line
+ 7150 3600 7100 3600
+Wire Wire Line
+ 7150 3250 7150 3600
+$Comp
+L Device:LED D1
+U 1 1 60FDD5EC
+P 6950 3250
+F 0 "D1" H 6950 3050 50 0000 C CNN
+F 1 "LED" H 6950 3150 50 0000 C CNN
+F 2 "TripwireHook_Diode:3W_LED" H 6950 3250 50 0001 C CNN
+F 3 "~" H 6950 3250 50 0001 C CNN
+ 1 6950 3250
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 7150 3600 7150 3700
+Wire Wire Line
+ 7150 3700 7250 3700
+Connection ~ 7150 3600
+Wire Wire Line
+ 6750 3600 6750 3700
+Wire Wire Line
+ 6750 3700 6650 3700
+Connection ~ 6750 3600
$EndSCHEMATC
diff --git a/TripwireHook b/TripwireHook
index e24219b9408615c786a4b801f4fcc79131704086..c2d90e7970e3a8dd85c91092769cb9ffc5025965 160000
--- a/TripwireHook
+++ b/TripwireHook
@@ -1 +1 @@
-Subproject commit e24219b9408615c786a4b801f4fcc79131704086
+Subproject commit c2d90e7970e3a8dd85c91092769cb9ffc5025965
diff --git a/fp-lib-table b/fp-lib-table
index 8cc46a623fe511a93c1cef0f066922376de3967e..9f2c7590cf71f39dab8140fdbf516f1c2097592f 100644
--- a/fp-lib-table
+++ b/fp-lib-table
@@ -4,4 +4,5 @@
(lib (name TripwireHook_Connector_Handmade)(type KiCad)(uri ${KIPRJMOD}/TripwireHook/TripwireHook_Connector_Handmade.pretty)(options "")(descr ""))
(lib (name TripwireHook_Capacitor)(type KiCad)(uri ${KIPRJMOD}/TripwireHook/Capacitor.pretty)(options "")(descr ""))
(lib (name TripwireHook_Diode)(type KiCad)(uri ${KIPRJMOD}/TripwireHook/Diode.pretty)(options "")(descr ""))
+ (lib (name TripwireHook_Inductor)(type KiCad)(uri ${KIPRJMOD}/TripwireHook/Inductor.pretty)(options "")(descr ""))
)