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Andreas Horn
ch32v003fun
Commits
5b0a0f43
Commit
5b0a0f43
authored
10 months ago
by
cnlohr
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Update with PD defines
parent
9d7ee13b
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ch32v003fun/ch32v003fun.h
+147
-21
147 additions, 21 deletions
ch32v003fun/ch32v003fun.h
examples_x035/usbdevice/usb_config.h
+1
-1
1 addition, 1 deletion
examples_x035/usbdevice/usb_config.h
with
148 additions
and
22 deletions
ch32v003fun/ch32v003fun.h
+
147
−
21
View file @
5b0a0f43
...
...
@@ -56,6 +56,7 @@
#define FUNCONF_UART_PRINTF_BAUD 115200 // Only used if FUNCONF_USE_UARTPRINTF is set.
#define FUNCONF_DEBUGPRINTF_TIMEOUT 160000 // Arbitrary time units
#define FUNCONF_ENABLE_HPE 1 // Enable hardware interrupt stack. Very good on QingKeV4, i.e. x035, v10x, v20x, v30x, but questionable on 003.
#define FUNCONF_USE_5V_VDD 0 // Enable this if you plan to use your part at 5V - affects USB and PD configration on the x035.
*/
// Sanity check for when porting old code.
...
...
@@ -179,6 +180,10 @@
#endif
#endif
#ifndef FUNCONF_USE_5V_VDD
#define FUNCONF_USE_5V_VDD 0
#endif
// Default package for CH32V20x
#if defined(CH32V20x)
#if !defined(CH32V20x_D8W) && !defined(CH32V20x_D8) && !defined(CH32V20x_D6)
...
...
@@ -1773,18 +1778,11 @@ typedef struct
__IO uint32_t UEPX_MOD;
} USBFS_TypeDef;
#define USB_PHY_V33 (1<<6)
#define USB_IOEN (1<<7)
#define UDP_PUE_00 (0b00<<2)
#define UDP_PUE_01 (0b01<<2)
#define UDP_PUE_10 (0b10<<2)
#define UDP_PUE_11 (0b11<<2)
#define UDM_PUE_00 (0b00<<0)
#define UDM_PUE_01 (0b01<<0)
#define UDM_PUE_10 (0b10<<0)
#define UDM_PUE_11 (0b11<<0)
#define USBFSD_UEP_MOD_BASE 0x4002340C
#define USBFSD_UEP_DMA_BASE 0x40023410
...
...
@@ -1898,17 +1896,6 @@ typedef struct
#define UNUM_EP 8
#define UDP_PUE_MASK 0x0000000C
#define UDP_PUE_DISABLE 0x00000000
#define UDP_PUE_35UA 0x00000004
#define UDP_PUE_10K 0x00000008
#define UDP_PUE_1K5 0x0000000C
#define UDM_PUE_MASK 0x00000003
#define UDM_PUE_DISABLE 0x00000000
#define UDM_PUE_35UA 0x00000001
#define UDM_PUE_10K 0x00000002
#define UDM_PUE_1K5 0x00000003
/* USB Host Mode */
...
...
@@ -1978,6 +1965,27 @@ typedef struct
__IO uint32_t DMA;
} USBPD_TypeDef;
/* USB Power Delivery */
typedef struct
{
__IO uint16_t CONFIG;
__IO uint16_t BCM_CLK_CNT;
__IO uint8_t CONTROL;
__IO uint8_t TX_SEL;
__IO uint16_t BMC_TX_SZ;
__IO uint8_t DATA_BUF;
__IO uint8_t STATUS;
__IO uint16_t BMC_BYTE_CNT;
__IO uint16_t PORT_CC1;
__IO uint16_t PORT_CC2;
__IO uint32_t USBPD_DMA;
} USBPD_DETAILED_TypeDef;
#endif // #if defined(CH32X03x)
...
...
@@ -2188,6 +2196,123 @@ typedef struct
#endif
#endif
// AFIO CTLR Bits
#define PB6_FILT_EN (1<<27)
#define PB5_FILT_EN (1<<26)
#define PA4_FILT_EN (1<<25)
#define PA3_FILT_EN (1<<24)
#define UDM_BC_CMPO (1<<19)
#define UDP_BC_CMPO (1<<17)
#define UDM_BC_VSRC (1<<17)
#define UDP_BC_VSRC (1<<16)
#define USBPD_IN_HVT (1<<9)
#define USBPD_PHY_V33 (1<<8)
#define USB_IOEN (1<<7)
#define USB_PHY_V33 (1<<6)
#define UDP_PUE_00 (0b00<<2)
#define UDP_PUE_01 (0b01<<2)
#define UDP_PUE_10 (0b10<<2)
#define UDP_PUE_11 (0b11<<2)
#define UDM_PUE_00 (0b00<<0)
#define UDM_PUE_01 (0b01<<0)
#define UDM_PUE_10 (0b10<<0)
#define UDM_PUE_11 (0b11<<0)
#define UDP_PUE_MASK 0x0000000C
#define UDP_PUE_DISABLE 0x00000000
#define UDP_PUE_35UA 0x00000004
#define UDP_PUE_10K 0x00000008
#define UDP_PUE_1K5 0x0000000C
#define UDM_PUE_MASK 0x00000003
#define UDM_PUE_DISABLE 0x00000000
#define UDM_PUE_35UA 0x00000001
#define UDM_PUE_10K 0x00000002
#define UDM_PUE_1K5 0x00000003
// USB PD Bits
#define IE_TX_END (1<<15)
#define IE_RX_RESET (1<<14)
#define IE_RX_ACT (1<<13)
#define IE_RX_BYTE (1<<12)
#define IE_RX_BIT (1<<11)
#define IE_PD_IO (1<<10)
#define WAKE_POLAR (1<<5)
#define PD_RST_EN (1<<4)
#define PD_DMA_EN (1<<3)
#define CC_SEL (1<<2)
#define PD_ALL_CLR (1<<1)
#define PD_FILT_EN (1<<0)
#define BMC_CLK_CNT_MASK (0xff)
//R8_CONTROL
#define BMC_BYTE_HI (1<<7)
#define TX_BIT_BACK (1<<6)
#define DATA_FLAG (1<<5)
#define RX_STATE_MASK (0x7<<2)
#define RX_STATE_0 (1<<2)
#define RX_STATE_1 (1<<3)
#define RX_STATE_2 (1<<4)
#define BMC_START (1<<1)
#define PD_TX_EN (1<<0)
#define TX_SEL4_MASK (3<<6)
#define TX_SEL4_0 (1<<6)
#define TX_SEL4_1 (1<<7)
#define TX_SEL3_MASK (3<<4)
#define TX_SEL3_0 (1<<4)
#define TX_SEL3_1 (1<<5)
#define TX_SEL2_MASK (3<<2)
#define TX_SEL2_0 (1<<2)
#define TX_SEL2_1 (1<<3)
#define TX_SEL1 (1<<0)
#define BMC_TX_SZ_MASK (0x1ff)
//R8_STATUS
#define IF_TX_END (1<<7)
#define IF_RX_RESET (1<<6)
#define IF_RX_ACT (1<<5)
#define IF_RX_BYTE (1<<4)
#define IF_RX_BIT (1<<3)
#define IFBUF_ERR (1<<2)
#define BMC_AUX_MASK (3<<0)
#define BMC_AUX_1 (1<<1)
#define BMC_AUX_0 (1<<0)
// PORT CC1
#define CC1_CE_MASK (7<<5)
#define CC1_CE_0 (1<<5)
#define CC1_CE_1 (2<<5)
#define CC1_CE_2 (4<<5)
#define CC1_LVE (1<<4)
#define CC1_PU_MASK (3<<2)
#define CC1_PU_DISABLE (0<<2)
#define CC1_PU_330uA (1<<2)
#define CC1_PU_180uA (2<<2)
#define CC1_PU_80uA (3<<2)
#define PA_CC1_AI (1<<0)
#define CC2_CE_MASK (7<<5)
#define CC2_CE_0 (1<<5)
#define CC2_CE_1 (2<<5)
#define CC2_CE_2 (4<<5)
#define CC2_LVE (1<<4)
#define CC2_PU_MASK (3<<2)
#define CC2_PU_DISABLE (0<<2)
#define CC2_PU_330uA (1<<2)
#define CC2_PU_180uA (2<<2)
#define CC2_PU_80uA (3<<2)
#define PA_CC2_AI (1<<0)
/* Peripheral declaration */
#define TIM2 ((TIM_TypeDef *)TIM2_BASE)
#if defined(CH32V10x) || defined(CH32V20x) || defined(CH32V30x)
...
...
@@ -2263,7 +2388,8 @@ typedef struct
#define TKey ((TKEY_TypeDef *)ADC1_BASE)
#define OPA ((OPACMP_TypeDef *)OPA_BASE)
#define USBFS ((USBFS_TypeDef *)USBFS_BASE)
#define USBPD ((USBPD_TypeDef *)USBPD_BASE)
#define USBPDWORD ((USBPD_TypeDef *)USBPD_BASE)
#define USBPD ((USBPD_DETAILED_TypeDef *)USBPD_BASE)
#define USBDH ((USBDH_TypeDef *)USBFS_BASE)
#endif
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examples_x035/usbdevice/usb_config.h
+
1
−
1
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5b0a0f43
...
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@@ -127,7 +127,7 @@ static const uint8_t config_descriptor[ ] =
0x09
,
// bLength
0x02
,
// bDescriptorType
0x54
,
0x00
,
// wTotalLength
0x03
,
// bNumInterfaces (
2
)
0x03
,
// bNumInterfaces (
3
)
0x01
,
// bConfigurationValue
0x00
,
// iConfiguration
0xA0
,
// bmAttributes: Bus Powered; Remote Wakeup
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