configurable HSITRIM value in SystemInit48HSI()

ch32v003fun/ch32v003fun.c

@@ -808,7 +808,7 @@ void SystemInit48HSI( void )
 {
 	// Values lifted from the EVT.  There is little to no documentation on what this does.
 	RCC->CFGR0 = RCC_HPRE_DIV1 | RCC_PLLSRC_HSI_Mul2;    // PLLCLK = HSI * 2 = 48 MHz; HCLK = SYSCLK = APB1
-	RCC->CTLR  = RCC_HSION | RCC_PLLON | (3 << HSITRIM); // Use HSI, but enable PLL.
+	RCC->CTLR  = RCC_HSION | RCC_PLLON | (HSITRIM << 3); // Use HSI, but enable PLL.
 	FLASH->ACTLR = FLASH_ACTLR_LATENCY_1;                // 1 Cycle Latency
 	RCC->INTR  = 0x009F0000;                             // Clear PLL, CSSC, HSE, HSI and LSI ready flags.