Add a sandbox for me to poke with random things.

sandbox/Makefile

+TARGET:=sandbox
+
+all : flash
+
+PREFIX:=riscv64-unknown-elf
+
+GPIO_Toggle:=EXAM/GPIO/GPIO_Toggle/User
+
+EVT:=../ch32v003evt
+
+CFLAGS:= \
+	-g -Os -flto -ffunction-sections \
+	-static-libgcc -lgcc \
+	-march=rv32ec \
+	-mabi=ilp32e \
+	-I/usr/include/newlib \
+	-I$(EVT) \
+	-nostdlib \
+	-I.
+
+LDFLAGS:=-T $(EVT)/ch32v003.ld -Wl,--gc-sections
+
+SYSTEM_C:=$(EVT)/startup_ch32v00x.S $(EVT)/embedlibc.c
+
+$(TARGET).elf : $(TARGET).c $(SYSTEM_C)
+	$(PREFIX)-gcc -o $@ $^ $(CFLAGS) $(LDFLAGS)
+
+$(TARGET).bin : $(TARGET).elf
+	$(PREFIX)-size $^
+	$(PREFIX)-objdump -S $^ > $(TARGET).lst
+	$(PREFIX)-objdump -t $^ > $(TARGET).map
+	$(PREFIX)-objcopy -O binary $< $(TARGET).bin
+	$(PREFIX)-objcopy -O ihex $< $(TARGET).hex
+
+flash : $(TARGET).bin
+	make -C ../minichlink all
+	../minichlink/minichlink -w $< -r
+
+clean :
+	rm -rf $(TARGET).elf $(TARGET).bin $(TARGET).hex $(TARGET).lst $(TARGET).map $(TARGET).hex
+

sandbox/sandbox.c

+// Could be defined here, or in the processor defines.
+#define SYSTEM_CORE_CLOCK 48000000
+
+#include "ch32v00x.h"
+#include <stdio.h>
+
+#define APB_CLOCK SYSTEM_CORE_CLOCK
+
+void SystemInit(void)
+{
+	// Values lifted from the EVT.  There is little to no documentation on what this does.
+	RCC->CTLR |= (uint32_t)0x00000001;
+	RCC->CFGR0 &= (uint32_t)0xFCFF0000;
+	RCC->CTLR &= (uint32_t)0xFEF6FFFF;
+	RCC->CTLR &= (uint32_t)0xFFFBFFFF;
+	RCC->CFGR0 &= (uint32_t)0xFFFEFFFF;
+	RCC->INTR = 0x009F0000;
+
+	// From SetSysClockTo_48MHZ_HSI
+	// This is some dark stuff.  But, I copy-pasted it and it seems towork.
+	FLASH->ACTLR = (FLASH->ACTLR & ((uint32_t)~FLASH_ACTLR_LATENCY)) | FLASH_ACTLR_LATENCY_1; 	// Flash 0 wait state
+	RCC->CFGR0 = ( RCC->CFGR0 & ((uint32_t)~(RCC_PLLSRC)) ) | (uint32_t)(RCC_PLLSRC_HSI_Mul2); 	// PLL configuration: PLLCLK = HSI * 2 = 48 MHz
+	RCC->CTLR |= RCC_PLLON; 																	// Enable PLL
+	while((RCC->CTLR & RCC_PLLRDY) == 0);														// Wait till PLL is ready
+	RCC->CFGR0 = ( RCC->CFGR0 & ((uint32_t)~(RCC_SW))) | (uint32_t)RCC_SW_PLL;					// Select PLL as system clock source
+	while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08);									// Wait till PLL is used as system clock source
+
+
+}
+
+int main()
+{
+
+	// PLL + Prescale down ADC
+//	RCC->CFGR0 = RCC_SW_PLL | RCC_SWS_PLL | RCC_ADCPRE_DIV8;
+//	RCC->CTLR = RCC_PLLON | RCC_HSION | 0xff00;
+//	RCC->CTLR = RCC_PLLON | RCC_HSION | 0xff00;
+
+	// wow, it seems we
+	RCC->CTLR = RCC_PLLON | RCC_HSION | 0xf8;
+
+	// Enable GPIOD.
+	RCC->APB2PCENR |= RCC_APB2Periph_GPIOD;
+
+	// GPIO D0 Push-Pull, 10MHz Output
+	GPIOD->CFGLR &= ~(0xf<<(4*0));
+	GPIOD->CFGLR |= (GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*0);
+
+	// Testing with reset
+	GPIOD->CFGLR &= ~(0xf<<(4*7));
+	GPIOD->CFGLR |= (GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*7);
+
+	// Testing with PD6
+	GPIOD->CFGLR &= ~(0xf<<(4*6));
+	GPIOD->CFGLR |= (GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*6);
+
+	while(1)
+	{
+		GPIOD->BSHR = 128+64+1;
+		GPIOD->BSHR = 1<<16;
+		GPIOD->BSHR = 1;
+		GPIOD->BSHR = 1<<16;
+		GPIOD->BSHR = 1;
+		GPIOD->BSHR = (128+64+1)<<16;
+	}
+}