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Commit aeef7b7b authored by cnlohr's avatar cnlohr
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One of the endpoints works, but not the other?

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examples_x035/usbdevice.incomplete/fsusb.c
+ 196
− 115
View file @ aeef7b7b
...@@ -7,22 +7,6 @@ uint32_t USBDEBUG0, USBDEBUG1, USBDEBUG2; ...@@ -7,22 +7,6 @@ uint32_t USBDEBUG0, USBDEBUG1, USBDEBUG2;
// based on https://github.com/openwch/ch32x035/tree/main/EVT/EXAM/USB/USBFS/DEVICE/CompositeKM/User // based on https://github.com/openwch/ch32x035/tree/main/EVT/EXAM/USB/USBFS/DEVICE/CompositeKM/User
#define DEF_USBD_UEP0_SIZE 64 /* usb hs/fs device end-point 0 size */
#define EP_SIZE 64
#define DEF_UEP_IN 0x80
#define DEF_UEP_OUT 0x00
#define DEF_UEP0 0
#define DEF_UEP1 1
#define DEF_UEP2 2
#define DEF_UEP3 3
#define DEF_UEP4 4
#define DEF_UEP5 5
#define DEF_UEP6 6
#define DEF_UEP7 7
#define NUM_EP 8
// Mask for the combined USBFSD->INT_FG + USBFSD->INT_ST // Mask for the combined USBFSD->INT_FG + USBFSD->INT_ST
#define CRB_U_IS_NAK (1<<7) #define CRB_U_IS_NAK (1<<7)
#define CTOG_MATCH_SYNC (1<<6) #define CTOG_MATCH_SYNC (1<<6)
...@@ -37,8 +21,6 @@ uint32_t USBDEBUG0, USBDEBUG1, USBDEBUG2; ...@@ -37,8 +21,6 @@ uint32_t USBDEBUG0, USBDEBUG1, USBDEBUG2;
#define CMASK_UIS_TOKEN (3<<12) #define CMASK_UIS_TOKEN (3<<12)
#define CMASK_UIS_ENDP (0xf<<8) #define CMASK_UIS_ENDP (0xf<<8)
#define CUSBFS_UIS_ENDP_MASK 0x0
#define CUIS_TOKEN_OUT 0x0 #define CUIS_TOKEN_OUT 0x0
#define CUIS_TOKEN_SOF 0x1 #define CUIS_TOKEN_SOF 0x1
#define CUIS_TOKEN_IN 0x2 #define CUIS_TOKEN_IN 0x2
...@@ -136,62 +118,68 @@ void USBFS_IRQHandler() ...@@ -136,62 +118,68 @@ void USBFS_IRQHandler()
if( intfgst & CRB_UIF_TRANSFER ) if( intfgst & CRB_UIF_TRANSFER )
{ {
int token = ( intfgst & CMASK_UIS_TOKEN) >> 12; int token = ( intfgst & CMASK_UIS_TOKEN) >> 12;
int ep = intfgst & CUSBFS_UIS_ENDP_MASK; int ep = ( intfgst & CMASK_UIS_ENDP ) >> 8;
if( ep == 2 )
USBDEBUG1++;
switch ( token ) switch ( token )
{ {
case CUIS_TOKEN_IN: case CUIS_TOKEN_IN:
switch( ep ) switch( ep )
{ {
/* end-point 0 data in interrupt */ /* end-point 0 data in interrupt */
case DEF_UEP0: case DEF_UEP0:
if( USBFS_SetupReqLen == 0 ) if( USBFS_SetupReqLen == 0 )
{ {
USBFS->UEP0_CTRL_H = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK; USBFS->UEP0_CTRL_H = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
} }
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD ) if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
{ {
/* Non-standard request endpoint 0 Data upload */ /* Non-standard request endpoint 0 Data upload, noted by official docs, but I don't think this would ever really be used. */
} }
else else
{
switch( USBFS_SetupReqCode )
{ {
switch( USBFS_SetupReqCode ) case USB_GET_DESCRIPTOR:
{ len = USBFS_SetupReqLen >= DEF_USBD_UEP0_SIZE ? DEF_USBD_UEP0_SIZE : USBFS_SetupReqLen;
case USB_GET_DESCRIPTOR: memcpy( USBFS_EP0_Buf, pUSBFS_Descr, len );
len = USBFS_SetupReqLen >= DEF_USBD_UEP0_SIZE ? DEF_USBD_UEP0_SIZE : USBFS_SetupReqLen; USBFS_SetupReqLen -= len;
memcpy( USBFS_EP0_Buf, pUSBFS_Descr, len ); pUSBFS_Descr += len;
USBFS_SetupReqLen -= len; USBFS->UEP0_TX_LEN = len;
pUSBFS_Descr += len; USBFS->UEP0_CTRL_H ^= USBFS_UEP_T_TOG;
USBFS->UEP0_TX_LEN = len; break;
USBFS->UEP0_CTRL_H ^= USBFS_UEP_T_TOG;
break;
case USB_SET_ADDRESS: case USB_SET_ADDRESS:
USBFS->DEV_ADDR = ( USBFS->DEV_ADDR & USBFS_UDA_GP_BIT ) | USBFS_DevAddr; USBFS->DEV_ADDR = ( USBFS->DEV_ADDR & USBFS_UDA_GP_BIT ) | USBFS_DevAddr;
break; break;
default: default:
break; break;
}
} }
break; }
break;
/* end-point 1 data in interrupt */
case DEF_UEP1: /* end-point 1 data in interrupt */
USBFS->UEP1_CTRL_H = ( USBFS->UEP1_CTRL_H & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_NAK; case DEF_UEP1:
USBFS->UEP1_CTRL_H ^= USBFS_UEP_T_TOG; USBFS->UEP1_CTRL_H = ( USBFS->UEP1_CTRL_H & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_NAK;
USBFS_Endp_Busy[ DEF_UEP1 ] = 0; USBFS->UEP1_CTRL_H ^= USBFS_UEP_T_TOG;
break; USBFS_Endp_Busy[ DEF_UEP1 ] = 0;
USBDEBUG0++;
/* end-point 2 data in interrupt */ break;
case DEF_UEP2:
USBFS->UEP2_CTRL_H = ( USBFS->UEP2_CTRL_H & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_NAK; /* end-point 2 data in interrupt */
USBFS->UEP2_CTRL_H ^= USBFS_UEP_T_TOG; case DEF_UEP2:
USBFS_Endp_Busy[ DEF_UEP2 ] = 0; USBFS->UEP2_CTRL_H = ( USBFS->UEP2_CTRL_H & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_NAK;
break; USBFS->UEP2_CTRL_H ^= USBFS_UEP_T_TOG;
USBFS_Endp_Busy[ DEF_UEP2 ] = 0;
default : USBDEBUG0++;
break; break;
default :
break;
} }
break; break;
...@@ -261,67 +249,36 @@ void USBFS_IRQHandler() ...@@ -261,67 +249,36 @@ void USBFS_IRQHandler()
break; break;
case HID_SET_IDLE: case HID_SET_IDLE:
if( USBFS_SetupReqIndex == 0x00 ) if( USBFS_SetupReqIndex < 0x02 )
{ USBFS_HidIdle[ USBFS_SetupReqIndex ] = (uint8_t)( USBFS_SetupReqValue >> 8 );
USBFS_HidIdle[ 0 ] = (uint8_t)( USBFS_SetupReqValue >> 8 );
}
else if( USBFS_SetupReqIndex == 0x01 )
{
USBFS_HidIdle[ 1 ] = (uint8_t)( USBFS_SetupReqValue >> 8 );
}
else else
{
errflag = 0xFF; errflag = 0xFF;
}
break; break;
case HID_SET_PROTOCOL: case HID_SET_PROTOCOL:
if( USBFS_SetupReqIndex == 0x00 ) if ( USBFS_SetupReqIndex < 0x02 )
{ USBFS_HidProtocol[USBFS_SetupReqIndex] = (uint8_t)USBFS_SetupReqValue;
USBFS_HidProtocol[ 0 ] = (uint8_t)USBFS_SetupReqValue;
}
else if( USBFS_SetupReqIndex == 0x01 )
{
USBFS_HidProtocol[ 1 ] = (uint8_t)USBFS_SetupReqValue;
}
else else
{
errflag = 0xFF; errflag = 0xFF;
}
break; break;
case HID_GET_IDLE: case HID_GET_IDLE:
if( USBFS_SetupReqIndex == 0x00 ) if( USBFS_SetupReqIndex < 0x02 )
{
USBFS_EP0_Buf[ 0 ] = USBFS_HidIdle[ 0 ];
len = 1;
}
else if( USBFS_SetupReqIndex == 0x01 )
{ {
USBFS_EP0_Buf[ 0 ] = USBFS_HidIdle[ 1 ]; USBFS_EP0_Buf[ 0 ] = USBFS_HidIdle[ USBFS_SetupReqIndex ];
len = 1; len = 1;
} }
else else
{
errflag = 0xFF; errflag = 0xFF;
}
break; break;
case HID_GET_PROTOCOL: case HID_GET_PROTOCOL:
if( USBFS_SetupReqIndex == 0x00 ) if( USBFS_SetupReqIndex < 0x02 )
{
USBFS_EP0_Buf[ 0 ] = USBFS_HidProtocol[ 0 ];
len = 1;
}
else if( USBFS_SetupReqIndex == 0x01 )
{ {
USBFS_EP0_Buf[ 0 ] = USBFS_HidProtocol[ 1 ]; USBFS_EP0_Buf[ 0 ] = USBFS_HidProtocol[ USBFS_SetupReqIndex ];
len = 1; len = 1;
} }
else else
{
errflag = 0xFF; errflag = 0xFF;
}
break; break;
default: default:
...@@ -433,7 +390,6 @@ void USBFS_IRQHandler() ...@@ -433,7 +390,6 @@ void USBFS_IRQHandler()
} }
len = ( USBFS_SetupReqLen >= DEF_USBD_UEP0_SIZE ) ? DEF_USBD_UEP0_SIZE : USBFS_SetupReqLen; len = ( USBFS_SetupReqLen >= DEF_USBD_UEP0_SIZE ) ? DEF_USBD_UEP0_SIZE : USBFS_SetupReqLen;
memcpy( USBFS_EP0_Buf, pUSBFS_Descr, len ); memcpy( USBFS_EP0_Buf, pUSBFS_Descr, len );
USBDEBUG0 = USBFS_EP0_Buf[3];
pUSBFS_Descr += len; pUSBFS_Descr += len;
break; break;
...@@ -699,8 +655,8 @@ USBDEBUG0 = USBFS_EP0_Buf[3]; ...@@ -699,8 +655,8 @@ USBDEBUG0 = USBFS_EP0_Buf[3];
void USBFS_Device_Endp_Init() void USBFS_Device_Endp_Init()
{ {
USBFS->UEP4_1_MOD = EP_SIZE; USBFS->UEP4_1_MOD = RB_UEP1_TX_EN;
USBFS->UEP2_3_MOD = EP_SIZE; USBFS->UEP2_3_MOD = RB_UEP2_TX_EN;
USBFS->UEP567_MOD = 0; USBFS->UEP567_MOD = 0;
USBFS->UEP0_DMA = (intptr_t)USBFS_EP0_Buf; USBFS->UEP0_DMA = (intptr_t)USBFS_EP0_Buf;
...@@ -721,8 +677,8 @@ void USBFS_Device_Endp_Init() ...@@ -721,8 +677,8 @@ void USBFS_Device_Endp_Init()
void USBFS_Poll() void USBFS_Poll()
{ {
USBDEBUG2 = USBFS->INT_ST;//EP0_DATA[1]; //USBDEBUG2 = USBFS->INT_ST;//EP0_DATA[1];
USBDEBUG1 = USBFS->MIS_ST; //USBDEBUG1 = USBFS->MIS_ST;
} }
int FSUSBSetup() int FSUSBSetup()
...@@ -735,16 +691,17 @@ int FSUSBSetup() ...@@ -735,16 +691,17 @@ int FSUSBSetup()
AFIO->CTLR |= USB_PHY_V33; AFIO->CTLR |= USB_PHY_V33;
USBFS->BASE_CTRL = RB_UC_RESET_SIE | RB_UC_CLR_ALL; USBFS->BASE_CTRL = RB_UC_RESET_SIE | RB_UC_CLR_ALL;
USBFS->BASE_CTRL = RB_UC_DEV_PU_EN | RB_UC_INT_BUSY | RB_UC_DMA_EN; USBFS->BASE_CTRL = 0x00;
USBFS_Device_Endp_Init();
// Enter device mode. // Enter device mode.
USBFS->INT_EN = RB_UIE_SUSPEND | RB_UIE_TRANSFER | RB_UIE_BUS_RST; USBFS->INT_EN = RB_UIE_SUSPEND | RB_UIE_TRANSFER | RB_UIE_BUS_RST;
USBFS->DEV_ADDR = 0x00; USBFS->DEV_ADDR = 0x00;
USBFS->BASE_CTRL = RB_UC_DEV_PU_EN | RB_UC_INT_BUSY | RB_UC_DMA_EN;
USBFS->INT_FG = 0xff;
USBFS->UDEV_CTRL = RB_UD_PD_DIS | RB_UD_PORT_EN; USBFS->UDEV_CTRL = RB_UD_PD_DIS | RB_UD_PORT_EN;
USBFS_Device_Endp_Init();
// Go on-bus. // Go on-bus.
// From the TRM: // From the TRM:
...@@ -763,18 +720,142 @@ int FSUSBSetup() ...@@ -763,18 +720,142 @@ int FSUSBSetup()
// GPIOC_OUTDR selects the up pull, and PC16 // GPIOC_OUTDR selects the up pull, and PC16
// corresponding to CNF=01 selects the floating input. // corresponding to CNF=01 selects the floating input.
// XXX TODO: Handle for 5V VDD.
AFIO->CTLR = (AFIO->CTLR & ~(UDP_PUE_11 | UDM_PUE_11 )) | USB_PHY_V33 | USB_IOEN | UDP_PUE_11; //1.5k pullup AFIO->CTLR = (AFIO->CTLR & ~(UDP_PUE_11 | UDM_PUE_11 )) | USB_PHY_V33 | USB_IOEN | UDP_PUE_11; //1.5k pullup
// Enable PC16/17 Alternate Function (USB) // Enable PC16/17 Alternate Function (USB)
// According to EVT, GPIO16 = GPIO_Mode_IN_FLOATING, GPIO17 = GPIO_Mode_IPU // According to EVT, GPIO16 = GPIO_Mode_IN_FLOATING, GPIO17 = GPIO_Mode_IPU
GPIOC->CFGXR = ( GPIOC->CFGXR & ~( (0xf<<(4*0)) | (0xf<<(4*1)) ) ) | GPIOC->CFGXR = ( GPIOC->CFGXR & ~( (0xf<<(4*0)) | (0xf<<(4*1)) ) ) |
(((GPIO_CFGLR_IN_FLOAT)<<(4*0)) | ((GPIO_CFGLR_IN_PUPD)<<(4*1)); // MSBs are CNF, LSBs are MODE (((GPIO_CFGLR_IN_FLOAT)<<(4*0)) | (((GPIO_CFGLR_IN_PUPD)<<(4*1)))); // MSBs are CNF, LSBs are MODE
GPIOC->BSXR = 1<<1; // PC17 on. GPIOC->BSXR = 1<<1; // PC17 on.
USBFS->UDEV_CTRL = RB_UD_PORT_EN;
// Go on-bus. // Go on-bus.
return 0; return 0;
} }
uint8_t USBFS_Endp_DataUp(uint8_t endp, uint8_t *pbuf, uint16_t len, uint8_t mod)
{
uint8_t endp_mode;
uint8_t buf_load_offset;
/* DMA config, endp_ctrl config, endp_len config */
if( ( endp >= DEF_UEP1 ) && ( endp <= DEF_UEP7 ) )
{
if( USBFS_Endp_Busy[ endp ] == 0 )
{
if( (endp == DEF_UEP1) || (endp == DEF_UEP4) )
{
/* endp1/endp4 */
endp_mode = USBFSD_UEP_MOD( 0 );
if( endp == DEF_UEP1 )
{
endp_mode = (uint8_t)( endp_mode >> 4 );
}
}
else if( ( endp == DEF_UEP2 ) || ( endp == DEF_UEP3 ) )
{
/* endp2/endp3 */
endp_mode = USBFSD_UEP_MOD( 1 );
if( endp == DEF_UEP3 )
{
endp_mode = (uint8_t)( endp_mode >> 4 );
}
}
else if( ( endp == DEF_UEP5 ) || ( endp == DEF_UEP6 ) )
{
/* endp5/endp6 */
endp_mode = USBFSD_UEP_MOD( 2 );
if( endp == DEF_UEP6 )
{
endp_mode = (uint8_t)( endp_mode >> 4 );
}
}
else
{
/* endp7 */
endp_mode = USBFSD_UEP_MOD( 3 );
}
if( endp_mode & USBFSD_UEP_TX_EN )
{
if( endp_mode & USBFSD_UEP_RX_EN )
{
if( endp_mode & USBFSD_UEP_BUF_MOD )
{
if( USBFSD_UEP_TX_CTRL(endp) & USBFS_UEP_T_TOG )
{
buf_load_offset = 192;
}
else
{
buf_load_offset = 128;
}
}
else
{
buf_load_offset = 64;
}
}
else
{
if( endp_mode & USBFSD_UEP_BUF_MOD )
{
/* double tx buffer */
if( USBFSD_UEP_TX_CTRL( endp ) & USBFS_UEP_T_TOG )
{
buf_load_offset = 64;
}
else
{
buf_load_offset = 0;
}
}
else
{
buf_load_offset = 0;
}
}
if( buf_load_offset == 0 )
{
if( mod == DEF_UEP_DMA_LOAD )
{
/* DMA mode */
USBFSD_UEP_DMA( endp ) = (uint16_t)(uint32_t)pbuf;
}
else
{
/* copy mode */
memcpy( USBFSD_UEP_BUF( endp ), pbuf, len );
}
}
else
{
memcpy( USBFSD_UEP_BUF( endp ) + buf_load_offset, pbuf, len );
}
/* tx length */
USBFSD_UEP_TLEN( endp ) = len;
/* response ack */
USBFSD_UEP_TX_CTRL( endp ) = ( USBFSD_UEP_TX_CTRL( endp ) & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_ACK;
/* Set end-point busy */
USBFS_Endp_Busy[ endp ] = 0x01;
}
}
else
{
return 1;
}
}
else
{
return 1;
}
return 0;
}
examples_x035/usbdevice.incomplete/fsusb.h
+ 75
− 15
View file @ aeef7b7b
...@@ -9,7 +9,7 @@ extern uint32_t USBDEBUG0, USBDEBUG1, USBDEBUG2; ...@@ -9,7 +9,7 @@ extern uint32_t USBDEBUG0, USBDEBUG1, USBDEBUG2;
int FSUSBSetup(); int FSUSBSetup();
void USBFS_Poll(); void USBFS_Poll();
uint8_t USBFS_Endp_DataUp(uint8_t endp, uint8_t *pbuf, uint16_t len, uint8_t mod);
// XXX TODO: Put the below in an object. // XXX TODO: Put the below in an object.
...@@ -18,12 +18,6 @@ void USBFS_Poll(); ...@@ -18,12 +18,6 @@ void USBFS_Poll();
/* Global */ /* Global */
extern const uint8_t *pUSBFS_Descr; extern const uint8_t *pUSBFS_Descr;
/* Setup Request */
extern volatile uint8_t USBFS_SetupReqCode;
extern volatile uint8_t USBFS_SetupReqType;
extern volatile uint16_t USBFS_SetupReqValue;
extern volatile uint16_t USBFS_SetupReqIndex;
extern volatile uint16_t USBFS_SetupReqLen;
/* USB Device Status */ /* USB Device Status */
extern volatile uint8_t USBFS_DevConfig; extern volatile uint8_t USBFS_DevConfig;
...@@ -43,11 +37,10 @@ extern volatile uint8_t USBFS_Endp_Busy[ ]; ...@@ -43,11 +37,10 @@ extern volatile uint8_t USBFS_Endp_Busy[ ];
// ABOVE: TOOD: REWRITE! // ABOVE: TOOD: REWRITE!
// Copied from x035 documentation. // Copied from x035 documentation.
#define USBFSD_UEP_MOD_BASE 0x4002340C
#define USBFSD_UEP_MOD_BASE 0x5000000C #define USBFSD_UEP_DMA_BASE 0x40023410
#define USBFSD_UEP_DMA_BASE 0x50000010 #define USBFSD_UEP_LEN_BASE 0x40023420
#define USBFSD_UEP_LEN_BASE 0x50000030 #define USBFSD_UEP_CTL_BASE 0x40023422
#define USBFSD_UEP_CTL_BASE 0x50000032
#define USBFSD_UEP_RX_EN 0x08 #define USBFSD_UEP_RX_EN 0x08
#define USBFSD_UEP_TX_EN 0x04 #define USBFSD_UEP_TX_EN 0x04
#define USBFSD_UEP_BUF_MOD 0x01 #define USBFSD_UEP_BUF_MOD 0x01
...@@ -55,13 +48,11 @@ extern volatile uint8_t USBFS_Endp_Busy[ ]; ...@@ -55,13 +48,11 @@ extern volatile uint8_t USBFS_Endp_Busy[ ];
#define DEF_UEP_CPY_LOAD 1 /* Use memcpy to move data to a buffer */ #define DEF_UEP_CPY_LOAD 1 /* Use memcpy to move data to a buffer */
#define USBFSD_UEP_MOD( N ) (*((volatile uint8_t *)( USBFSD_UEP_MOD_BASE + N ))) #define USBFSD_UEP_MOD( N ) (*((volatile uint8_t *)( USBFSD_UEP_MOD_BASE + N )))
#define USBFSD_UEP_TX_CTRL( N ) (*((volatile uint8_t *)( USBFSD_UEP_CTL_BASE + N * 0x04 ))) #define USBFSD_UEP_TX_CTRL( N ) (*((volatile uint8_t *)( USBFSD_UEP_CTL_BASE + N * 0x04 )))
#define USBFSD_UEP_RX_CTRL( N ) (*((volatile uint8_t *)( USBFSD_UEP_CTL_BASE + N * 0x04 + 1 ))) #define USBFSD_UEP_RX_CTRL( N ) (*((volatile uint8_t *)( USBFSD_UEP_CTL_BASE + N * 0x04 )))
#define USBFSD_UEP_DMA( N ) (*((volatile uint32_t *)( USBFSD_UEP_DMA_BASE + N * 0x04 ))) #define USBFSD_UEP_DMA( N ) (*((volatile uint32_t *)( USBFSD_UEP_DMA_BASE + N * 0x04 )))
#define USBFSD_UEP_BUF( N ) ((uint8_t *)(*((volatile uint32_t *)( USBFSD_UEP_DMA_BASE + N * 0x04 ))) + 0x20000000) #define USBFSD_UEP_BUF( N ) ((uint8_t *)(*((volatile uint32_t *)( USBFSD_UEP_DMA_BASE + N * 0x04 ))) + 0x20000000)
#define USBFSD_UEP_TLEN( N ) (*((volatile uint16_t *)( USBFSD_UEP_LEN_BASE + N * 0x04 ))) #define USBFSD_UEP_TLEN( N ) (*((volatile uint16_t *)( USBFSD_UEP_LEN_BASE + N * 0x04 )))
/* R8_UEPn_TX_CTRL */ /* R8_UEPn_TX_CTRL */
#define USBFS_UEP_T_AUTO_TOG (1<<4) // enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle #define USBFS_UEP_T_AUTO_TOG (1<<4) // enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
#define USBFS_UEP_T_TOG (1<<6) // prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1 #define USBFS_UEP_T_TOG (1<<6) // prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
...@@ -92,6 +83,75 @@ extern volatile uint8_t USBFS_Endp_Busy[ ]; ...@@ -92,6 +83,75 @@ extern volatile uint8_t USBFS_Endp_Busy[ ];
#define USBFS_USB_ADDR_MASK 0x7F #define USBFS_USB_ADDR_MASK 0x7F
#define DEF_USBD_UEP0_SIZE 64 /* usb hs/fs device end-point 0 size */
#define EP_SIZE 64
#define DEF_UEP_IN 0x80
#define DEF_UEP_OUT 0x00
#define DEF_UEP_BUSY 0x01
#define DEF_UEP_FREE 0x00
#define DEF_UEP0 0
#define DEF_UEP1 1
#define DEF_UEP2 2
#define DEF_UEP3 3
#define DEF_UEP4 4
#define DEF_UEP5 5
#define DEF_UEP6 6
#define DEF_UEP7 7
#define NUM_EP 8
// Hardware specific
#define EP1_T_EN (1<<6)
#define EP2_T_EN (1<<2)
#define EP3_T_EN (1<<6)
#define EP4_T_EN (1<<2)
#define EP1_R_EN (1<<7)
#define EP2_R_EN (1<<3)
#define EP3_R_EN (1<<7)
#define EP4_R_EN (1<<3)
/* R8_USB_CTRL */
#define USBFS_UC_HOST_MODE 0x80
#define USBFS_UC_LOW_SPEED 0x40
#define USBFS_UC_DEV_PU_EN 0x20
#define USBFS_UC_SYS_CTRL_MASK 0x30
#define USBFS_UC_SYS_CTRL0 0x00
#define USBFS_UC_SYS_CTRL1 0x10
#define USBFS_UC_SYS_CTRL2 0x20
#define USBFS_UC_SYS_CTRL3 0x30
#define USBFS_UC_INT_BUSY 0x08
#define USBFS_UC_RESET_SIE 0x04
#define USBFS_UC_CLR_ALL 0x02
#define USBFS_UC_DMA_EN 0x01
/* R8_USB_INT_EN */
#define USBFS_UIE_DEV_SOF 0x80
#define USBFS_UIE_DEV_NAK 0x40
#define USBFS_UIE_FIFO_OV 0x10
#define USBFS_UIE_HST_SOF 0x08
#define USBFS_UIE_SUSPEND 0x04
#define USBFS_UIE_TRANSFER 0x02
#define USBFS_UIE_DETECT 0x01
#define USBFS_UIE_BUS_RST 0x01
/* R8_USB_DEV_AD */
#define USBFS_UDA_GP_BIT 0x80
#define USBFS_USB_ADDR_MASK 0x7F
/* R8_USB_MIS_ST */
#define USBFS_UMS_SOF_PRES 0x80
#define USBFS_UMS_SOF_ACT 0x40
#define USBFS_UMS_SIE_FREE 0x20
#define USBFS_UMS_R_FIFO_RDY 0x10
#define USBFS_UMS_BUS_RESET 0x08
#define USBFS_UMS_SUSPEND 0x04
#define USBFS_UMS_DM_LEVEL 0x02
#define USBFS_UMS_DEV_ATTACH 0x01
/* USB Setup Request */ /* USB Setup Request */
typedef struct __attribute__((packed)) _USB_SETUP_REQ typedef struct __attribute__((packed)) _USB_SETUP_REQ
{ {
......
examples_x035/usbdevice.incomplete/usbdevice.c
+ 21
− 1
View file @ aeef7b7b
...@@ -29,8 +29,28 @@ void USBFS_IRQHandler(); ...@@ -29,8 +29,28 @@ void USBFS_IRQHandler();
//extern int USBFS_IRQHandler; //extern int USBFS_IRQHandler;
while(1) while(1)
{ {
printf( "%lu %lu %lu\n", USBDEBUG0, USBDEBUG1, USBDEBUG2 ); printf( "%lu %lu %lu %d %d\n", USBDEBUG0, USBDEBUG1, USBDEBUG2, USBFS_Endp_Busy[0], USBFS_Endp_Busy[1] );
USBFS_Poll(); USBFS_Poll();
int i;
//printf( "!! %d %d %d\n", NUM_EP, USBFS_Endp_Busy[0], USBFS_Endp_Busy[1] );
for( i = 1; i < 3; i++ )
{
if( !USBFS_Endp_Busy[i] )
{
/*
USBDEBUG0+= 100;
/* tx length */
//memset( USBFSD_UEP_BUF( i ), 0xaa, 16 );
// USBFSD_UEP_TLEN( i ) = 16;
// USBFSD_UEP_TX_CTRL( i ) = ( USBFSD_UEP_TX_CTRL( i ) & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_ACK;
// USBFS_Endp_Busy[i] = 1;
char pbuf[16] = { 0 };
uint8_t r = USBFS_Endp_DataUp( i, pbuf, 8, DEF_UEP_CPY_LOAD);
//USBDEBUG1+=r;
}
}
} }
#if 0 #if 0
......
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