Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
C
ch32v003fun
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Package registry
Container Registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Andreas Horn
ch32v003fun
Commits
d23cde06
Commit
d23cde06
authored
1 year ago
by
dwillmore
Browse files
Options
Downloads
Patches
Plain Diff
Add a direct GPIO example (compatable with 8 pin package)
parent
a4f73915
No related branches found
No related tags found
No related merge requests found
Changes
2
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
examples/direct_gpio/Makefile
+9
-0
9 additions, 0 deletions
examples/direct_gpio/Makefile
examples/direct_gpio/direct_gpio.c
+52
-0
52 additions, 0 deletions
examples/direct_gpio/direct_gpio.c
with
61 additions
and
0 deletions
examples/direct_gpio/Makefile
0 → 100644
+
9
−
0
View file @
d23cde06
TARGET
:=
direct_gpio
include
../../ch32v003fun/ch32v003fun.mk
all
:
flash
flash
:
cv_flash
clean
:
cv_clean
This diff is collapsed.
Click to expand it.
examples/direct_gpio/direct_gpio.c
0 → 100644
+
52
−
0
View file @
d23cde06
// Could be defined here, or in the processor defines.
#define SYSTEM_CORE_CLOCK 48000000
#include
"ch32v003fun.h"
#include
<stdio.h>
#define APB_CLOCK SYSTEM_CORE_CLOCK
uint32_t
count
;
int
main
()
{
SystemInit48HSI
();
// Enable GPIOs
RCC
->
APB2PCENR
|=
RCC_APB2Periph_GPIOC
;
// GPIO C1 Push-Pull
GPIOC
->
CFGLR
&=
~
(
0xf
<<
(
4
*
1
));
GPIOC
->
CFGLR
|=
(
GPIO_Speed_10MHz
|
GPIO_CNF_OUT_PP
)
<<
(
4
*
1
);
// GPIO C2 Push-Pull
GPIOC
->
CFGLR
&=
~
(
0xf
<<
(
4
*
2
));
GPIOC
->
CFGLR
|=
(
GPIO_Speed_10MHz
|
GPIO_CNF_OUT_PP
)
<<
(
4
*
2
);
// GPIO C4 Push-Pull
GPIOC
->
CFGLR
&=
~
(
0xf
<<
(
4
*
4
));
GPIOC
->
CFGLR
|=
(
GPIO_Speed_10MHz
|
GPIO_CNF_OUT_PP
)
<<
(
4
*
4
);
while
(
1
)
{
// Use low bits of BSHR to SET output
GPIOC
->
BSHR
=
1
<<
(
1
);
// SET GPIO C1
GPIOC
->
BSHR
=
1
<<
(
2
);
// SET GPIO C2
// Modify the OUTDR register directly to SET output
GPIOC
->
OUTDR
|=
1
<<
(
4
);
// SET GPIO C4
Delay_Ms
(
950
);
// Use upper bits of BSHR to RESET output
GPIOC
->
BSHR
=
(
1
<<
(
16
+
1
));
// RESET GPIO C1
// Use BCR to RESET output
GPIOC
->
BCR
=
(
1
<<
(
2
));
// RESET GPIO C2
// Modify the OUTDR register directly to CLEAR output
GPIOC
->
OUTDR
&=
~
(
1
<<
(
4
));
// CLEAR GPIO C4
Delay_Ms
(
50
);
count
++
;
}
}
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment