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Gits merging hint are exceptionally stupid. Downloaded and re-added the files from GitLab-_-
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1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 
$EndComp
Connection ~ 5750 3700
Wire Wire Line
	5750 3700 5750 3800
Wire Wire Line
	5050 3700 5750 3700
Text GLabel 5350 3500 1    50   Input ~ 0
Vtarget
Wire Wire Line
	5150 3600 5350 3600
Wire Wire Line
	5350 3600 5350 3500
$Comp
L Device:C C6
U 1 1 60CFD513
P 4750 3850
F 0 "C6" V 4700 3950 50  0000 C CNN
F 1 "100nF" V 4800 4000 50  0000 C CNN
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Using 0402 components  
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1019 
F 2 "Capacitor_SMD:C_0402_1005Metric" H 4788 3700 50  0001 C CNN
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Gits merging hint are exceptionally stupid. Downloaded and re-added the files from GitLab-_-
fxk8y committed
1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 
F 3 "~" H 4750 3850 50  0001 C CNN
	1    4750 3850
	1    0    0    1   
$EndComp
Wire Wire Line
	4950 3600 4750 3600
Wire Wire Line
	4750 3600 4750 3700
Connection ~ 4950 3600
Wire Wire Line
	4950 3600 4950 4100
$Comp
L power:GND #PWR0120
U 1 1 60D053A7
P 4750 4150
F 0 "#PWR0120" H 4750 3900 50  0001 C CNN
F 1 "GND" H 4755 3977 50  0000 C CNN
F 2 "" H 4750 4150 50  0001 C CNN
F 3 "" H 4750 4150 50  0001 C CNN
	1    4750 4150
	-1   0    0    -1  
$EndComp
Wire Wire Line
	4750 4000 4750 4150
$Comp
L Device:R R2
U 1 1 60D0EA91
P 2000 5100
F 0 "R2" V 1900 5250 50  0000 R CNN
F 1 "150" V 1900 5100 50  0000 R CNN
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Using 0402 components  
fxk8y committed
1050 
F 2 "Resistor_SMD:R_0402_1005Metric" V 1930 5100 50  0001 C CNN
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Gits merging hint are exceptionally stupid. Downloaded and re-added the files from GitLab-_-
fxk8y committed
1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 
F 3 "~" H 2000 5100 50  0001 C CNN
	1    2000 5100
	1    0    0    -1  
$EndComp
$Comp
L Device:LED D1
U 1 1 60D0EA97
P 2000 5500
F 0 "D1" V 1950 5350 50  0000 L CNN
F 1 "LED" V 2050 5300 50  0000 L CNN
F 2 "LED_SMD:LED_0805_2012Metric_Castellated" H 2000 5500 50  0001 C CNN
F 3 "~" H 2000 5500 50  0001 C CNN
	1    2000 5500
	0    -1   -1   0   
$EndComp
Wire Wire Line
	2000 4950 2000 4850
Wire Wire Line
	2000 4850 2200 4850
Wire Wire Line
	2000 5250 2000 5350
$Comp
L power:GND #PWR0121
U 1 1 60D0EAA0
P 2000 5750
F 0 "#PWR0121" H 2000 5500 50  0001 C CNN
F 1 "GND" H 2005 5577 50  0000 C CNN
F 2 "" H 2000 5750 50  0001 C CNN
F 3 "" H 2000 5750 50  0001 C CNN
	1    2000 5750
	1    0    0    -1  
$EndComp
Wire Wire Line
	2000 5650 2000 5750
Wire Wire Line
	2200 4850 2200 4950
Connection ~ 2200 4850
$Comp
L Device:R R8
U 1 1 60D3261E
P 6950 5100
F 0 "R8" V 7000 5350 50  0000 R CNN
F 1 "150" V 7000 4950 50  0000 R CNN
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Using 0402 components  
fxk8y committed
1094 
F 2 "Resistor_SMD:R_0402_1005Metric" V 6880 5100 50  0001 C CNN
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Gits merging hint are exceptionally stupid. Downloaded and re-added the files from GitLab-_-
fxk8y committed
1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 
F 3 "~" H 6950 5100 50  0001 C CNN
	1    6950 5100
	0    -1   -1   0   
$EndComp
$Comp
L Device:R R9
U 1 1 60D32624
P 6950 5200
F 0 "R9" V 7000 5450 50  0000 R CNN
F 1 "150" V 7000 5050 50  0000 R CNN
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Using 0402 components  
fxk8y committed
1105 
F 2 "Resistor_SMD:R_0402_1005Metric" V 6880 5200 50  0001 C CNN
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Gits merging hint are exceptionally stupid. Downloaded and re-added the files from GitLab-_-
fxk8y committed
1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 
F 3 "~" H 6950 5200 50  0001 C CNN
	1    6950 5200
	0    -1   -1   0   
$EndComp
$Comp
L Device:R R10
U 1 1 60D3262A
P 6950 5300
F 0 "R10" V 7000 5550 50  0000 R CNN
F 1 "150" V 7000 5150 50  0000 R CNN
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Using 0402 components  
fxk8y committed
1116 
F 2 "Resistor_SMD:R_0402_1005Metric" V 6880 5300 50  0001 C CNN
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Gits merging hint are exceptionally stupid. Downloaded and re-added the files from GitLab-_-
fxk8y committed
1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 
F 3 "~" H 6950 5300 50  0001 C CNN
	1    6950 5300
	0    -1   -1   0   
$EndComp
$Comp
L Device:R R11
U 1 1 60D32630
P 6950 5400
F 0 "R11" V 7000 5650 50  0000 R CNN
F 1 "150" V 7000 5250 50  0000 R CNN
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Using 0402 components  
fxk8y committed
1127 
F 2 "Resistor_SMD:R_0402_1005Metric" V 6880 5400 50  0001 C CNN
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Gits merging hint are exceptionally stupid. Downloaded and re-added the files from GitLab-_-
fxk8y committed
1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 
F 3 "~" H 6950 5400 50  0001 C CNN
	1    6950 5400
	0    -1   -1   0   
$EndComp
$Comp
L Device:R R12
U 1 1 60D3AAC9
P 6950 5500
F 0 "R12" V 7000 5750 50  0000 R CNN
F 1 "150" V 7000 5350 50  0000 R CNN
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Using 0402 components  
fxk8y committed
1138 
F 2 "Resistor_SMD:R_0402_1005Metric" V 6880 5500 50  0001 C CNN
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Gits merging hint are exceptionally stupid. Downloaded and re-added the files from GitLab-_-
fxk8y committed
1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 
F 3 "~" H 6950 5500 50  0001 C CNN
	1    6950 5500
	0    -1   -1   0   
$EndComp
Wire Wire Line
	6650 5100 6800 5100
Wire Wire Line
	6650 5200 6800 5200
Wire Wire Line
	6650 5300 6800 5300
Wire Wire Line
	6650 5400 6800 5400
Wire Wire Line
	6650 5500 6800 5500
$Comp
L Device:LED D3
U 1 1 60D677AC
P 7200 5750
F 0 "D3" V 7300 5600 50  0000 L CNN
F 1 "LED" V 7200 5550 50  0000 L CNN
F 2 "LED_SMD:LED_0603_1608Metric_Castellated" H 7200 5750 50  0001 C CNN
F 3 "~" H 7200 5750 50  0001 C CNN
	1    7200 5750
	0    -1   -1   0   
$EndComp
$Comp
L Device:LED D7
U 1 1 60D68714
P 8200 5750
F 0 "D7" V 8300 5600 50  0000 L CNN
F 1 "LED" V 8200 5550 50  0000 L CNN
F 2 "LED_SMD:LED_0603_1608Metric_Castellated" H 8200 5750 50  0001 C CNN
F 3 "~" H 8200 5750 50  0001 C CNN
	1    8200 5750
	0    -1   -1   0   
$EndComp
$Comp
L Device:LED D5
U 1 1 60D68AB9
P 7700 5750
F 0 "D5" V 7800 5600 50  0000 L CNN
F 1 "LED" V 7700 5550 50  0000 L CNN
F 2 "LED_SMD:LED_0603_1608Metric_Castellated" H 7700 5750 50  0001 C CNN
F 3 "~" H 7700 5750 50  0001 C CNN
	1    7700 5750
	0    -1   -1   0   
$EndComp
$Comp
L Device:LED D6
U 1 1 60D68D45
P 7950 5750
F 0 "D6" V 8050 5600 50  0000 L CNN
F 1 "LED" V 7950 5550 50  0000 L CNN
F 2 "LED_SMD:LED_0603_1608Metric_Castellated" H 7950 5750 50  0001 C CNN
F 3 "~" H 7950 5750 50  0001 C CNN
	1    7950 5750
	0    -1   -1   0   
$EndComp
$Comp
L Device:LED D4
U 1 1 60D68FB4
P 7450 5750
F 0 "D4" V 7550 5600 50  0000 L CNN
F 1 "LED" V 7450 5550 50  0000 L CNN
F 2 "LED_SMD:LED_0603_1608Metric_Castellated" H 7450 5750 50  0001 C CNN
F 3 "~" H 7450 5750 50  0001 C CNN
	1    7450 5750
	0    -1   -1   0   
$EndComp
Wire Wire Line
	7850 4850 7850 4750
Wire Wire Line
	7850 4750 7950 4750
Wire Wire Line
	7950 5000 8350 5000
Wire Wire Line
	7100 5100 8200 5100
Wire Wire Line
	8200 5100 8200 5600
Wire Wire Line
	7100 5200 7950 5200
Wire Wire Line
	7950 5200 7950 5600
Wire Wire Line
	7100 5300 7700 5300
Wire Wire Line
	7700 5300 7700 5600
Wire Wire Line
	7100 5400 7450 5400
Wire Wire Line
	7450 5400 7450 5600
Wire Wire Line
	7100 5500 7200 5500
Wire Wire Line
	7200 5500 7200 5600
$Comp
L power:GND #PWR0122
U 1 1 60DA3DA2
P 7700 6100
F 0 "#PWR0122" H 7700 5850 50  0001 C CNN
F 1 "GND" H 7705 5927 50  0000 C CNN
F 2 "" H 7700 6100 50  0001 C CNN
F 3 "" H 7700 6100 50  0001 C CNN
	1    7700 6100
	1    0    0    -1  
$EndComp
Wire Wire Line
	7200 5900 7200 6000
Wire Wire Line
	7200 6000 7450 6000
Wire Wire Line
	8200 6000 8200 5900
Wire Wire Line
	7450 5900 7450 6000
Connection ~ 7450 6000
Wire Wire Line
	7450 6000 7700 6000
Wire Wire Line
	7700 6100 7700 6000
Connection ~ 7700 6000
Wire Wire Line
	7700 6000 7950 6000
Wire Wire Line
	7700 5900 7700 6000
Wire Wire Line
	7950 5900 7950 6000
Connection ~ 7950 6000
Wire Wire Line
	7950 6000 8200 6000
$Comp
L Device:C C2
U 1 1 60DF1F72
P 4400 800
F 0 "C2" V 4350 900 50  0000 C CNN
F 1 "22µF" V 4450 950 50  0000 C CNN
F 2 "Capacitor_SMD:C_1210_3225Metric" H 4438 650 50  0001 C CNN
F 3 "~" H 4400 800 50  0001 C CNN
	1    4400 800 
	0    1    1    0   
$EndComp
Wire Wire Line
	3950 800  4250 800 
Wire Wire Line
	3950 800  3950 1050
Wire Wire Line
	4550 800  4700 800 
Wire Wire Line
	4700 800  4700 1050
Connection ~ 4700 1050
Wire Wire Line
	4700 1200 4850 1200
Connection ~ 4700 1200
Wire Wire Line
	4700 1200 4700 1300
Wire Wire Line
	3550 950  3550 1050
Connection ~ 3550 1050
Wire Wire Line
	3550 1050 3950 1050
$Comp
L Connector:TestPoint TP1
U 1 1 60E7212C
P 3550 1150
F 0 "TP1" V 3500 1100 50  0000 L CNN
F 1 "TestPoint" V 3550 1350 50  0000 L CNN
F 2 "TripwireHook:HexPad_SMD" H 3750 1150 50  0001 C CNN
F 3 "~" H 3750 1150 50  0001 C CNN
	1    3550 1150
	-1   0    0    1   
$EndComp
Wire Wire Line
	3550 1050 3550 1150
$Comp
L Connector:TestPoint TP2
U 1 1 60E7E20F
P 3750 2950
F 0 "TP2" V 3700 2900 50  0000 L CNN
F 1 "TestPoint" V 3750 3150 50  0000 L CNN
F 2 "TripwireHook:HexPad_SMD" H 3950 2950 50  0001 C CNN
F 3 "~" H 3950 2950 50  0001 C CNN
	1    3750 2950
	-1   0    0    1   
$EndComp
Wire Wire Line
	3750 2950 3750 2850
Wire Wire Line
	3750 2850 3900 2850
Connection ~ 3900 2850
$Comp
L Device:R R1
U 1 1 60ABE9DD
P 1550 3450
F 0 "R1" H 1700 3500 50  0000 R CNN
F 1 "100K" H 1800 3400 50  0000 R CNN
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Using 0402 components  
fxk8y committed
1333 
F 2 "Resistor_SMD:R_0402_1005Metric" V 1480 3450 50  0001 C CNN
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Gits merging hint are exceptionally stupid. Downloaded and re-added the files from GitLab-_-
fxk8y committed
1334 1335 1336 1337 
F 3 "~" H 1550 3450 50  0001 C CNN
	1    1550 3450
	-1   0    0    -1  
$EndComp
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Using 0402 components  
fxk8y committed
1338 1339 
Text Notes 9650 5550 0    50   ~ 0
@10mA use:\n- 180Ω for blue\n- 280Ω for green\n- 320Ω for red
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Add slide switch; Final placement  
fxk8y committed
1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 
Wire Wire Line
	5150 3200 5150 3600
Wire Wire Line
	5050 3200 5050 3700
Wire Wire Line
	4950 3200 4950 3600
$Comp
L power:+5V #PWR02
U 1 1 60C81E29
P 4750 3350
F 0 "#PWR02" H 4750 3200 50  0001 C CNN
F 1 "+5V" H 4765 3523 50  0000 C CNN
F 2 "" H 4750 3350 50  0001 C CNN
F 3 "" H 4750 3350 50  0001 C CNN
	1    4750 3350
	-1   0    0    1   
$EndComp
Wire Wire Line
	4750 3200 4750 3350
Text GLabel 4850 3200 3    50   Input ~ 0
VT_D
Text GLabel 4650 3200 3    50   Input ~ 0
3V3_D
Text GLabel 2900 3900 0    50   Input ~ 0
3V3_D
Text GLabel 2900 4100 0    50   Input ~ 0
VT_D
$Comp
L Device:R R18
U 1 1 60C9B8B7
P 3150 3900
F 0 "R18" V 3250 4100 50  0000 R CNN
F 1 "150" V 3250 3950 50  0000 R CNN
F 2 "Resistor_SMD:R_0402_1005Metric" V 3080 3900 50  0001 C CNN
F 3 "~" H 3150 3900 50  0001 C CNN
	1    3150 3900
	0    -1   -1   0   
$EndComp
$Comp
L Device:LED D12
U 1 1 60C9BC38
P 3550 3900
F 0 "D12" H 3650 3850 50  0000 L CNN
F 1 "LED" H 3450 3800 50  0000 L CNN
F 2 "LED_SMD:LED_0603_1608Metric_Castellated" H 3550 3900 50  0001 C CNN
F 3 "~" H 3550 3900 50  0001 C CNN
	1    3550 3900
	-1   0    0    1   
$EndComp
$Comp
L Device:R R19
U 1 1 60C9CACD
P 3150 4100
F 0 "R19" V 3050 4300 50  0000 R CNN
F 1 "150" V 3050 4150 50  0000 R CNN
F 2 "Resistor_SMD:R_0402_1005Metric" V 3080 4100 50  0001 C CNN
F 3 "~" H 3150 4100 50  0001 C CNN
	1    3150 4100
	0    -1   -1   0   
$EndComp
$Comp
L Device:LED D13
U 1 1 60C9D66D
P 3550 4100
F 0 "D13" H 3650 4050 50  0000 L CNN
F 1 "LED" H 3450 4200 50  0000 L CNN
F 2 "LED_SMD:LED_0603_1608Metric_Castellated" H 3550 4100 50  0001 C CNN
F 3 "~" H 3550 4100 50  0001 C CNN
	1    3550 4100
	-1   0    0    1   
$EndComp
Wire Wire Line
	2900 3900 3000 3900
Wire Wire Line
	3300 3900 3400 3900
Wire Wire Line
	2900 4100 3000 4100
Wire Wire Line
	3300 4100 3400 4100
$Comp
L power:GND #PWR01
U 1 1 60CD137D
P 3900 4000
F 0 "#PWR01" H 3900 3750 50  0001 C CNN
F 1 "GND" H 3905 3827 50  0000 C CNN
F 2 "" H 3900 4000 50  0001 C CNN
F 3 "" H 3900 4000 50  0001 C CNN
	1    3900 4000
	0    -1   -1   0   
$EndComp
Wire Wire Line
	3700 3900 3800 3900
Wire Wire Line
	3800 3900 3800 4000
Wire Wire Line
	3800 4100 3700 4100
Wire Wire Line
	3800 4000 3900 4000
Connection ~ 3800 4000
Wire Wire Line
	3800 4000 3800 4100
Wire Wire Line
	8350 5000 8350 5100
Wire Wire Line
	8350 5100 8500 5100
Wire Wire Line
	8500 5100 8500 5000
Wire Wire Line
	8950 5250 8750 5250
Wire Wire Line
	8950 5000 8950 5250
Wire Wire Line
	8950 5250 8950 5350
Connection ~ 8950 5250
Wire Wire Line
	8450 5250 8350 5250
Wire Wire Line
	8350 5250 8350 5100
Connection ~ 8350 5100
fxk8y's avatar
Gits merging hint are exceptionally stupid. Downloaded and re-added the files from GitLab-_-
fxk8y committed
1459 
$EndSCHEMATC
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